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Title: THE STEP RECOVERY DIODE WITH APPLICATIONS AS A FREQUENCY MULTIPLIER.
Creator: STROBEL, RUSSELL ALAN., Florida Atlantic University, Gazourian, Martin G., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: Portable UHF transceivers typically require minimal current drain frequency converters to multiply the frequencies generated by crystal controlled oscillators up to the UHF band. The step recovery diode (SRD) provides an approach to frequency multiplication that requires no d.c. bias and hence minimizes battery drain. This thesis compares the SRD to the more conventional varactor and analyzes SRD device physics and characteristics. SRD operation is explained in terms of the conduction and...
Show morePortable UHF transceivers typically require minimal current drain frequency converters to multiply the frequencies generated by crystal controlled oscillators up to the UHF band. The step recovery diode (SRD) provides an approach to frequency multiplication that requires no d.c. bias and hence minimizes battery drain. This thesis compares the SRD to the more conventional varactor and analyzes SRD device physics and characteristics. SRD operation is explained in terms of the conduction and depletion intervals. The rapid transition from the conduction to the depletion mode allows the SRD to generate high order harmonics of the input frequency. A step-by-step design procedure for a series mode frequency multiplier is presented and empirical observations are used to help explain multiplier operation. The jump phenomena and hysteresis effects previously unexplained in relation to SRD multipliers are explored. Finally, it is shown that the SRD can function as a parametric amplifier.
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Date Issued: 1979
PURL: http://purl.flvc.org/fcla/dt/13970
Subject Headings: Diodes, Switching, Diodes, Semiconductor
Format: Document (PDF)

Title: THE DESIGN OF HIGH FREQUENCY OSCILLATORS: NOISE CHARACTERIZATION, DESIGN THEORY, AND MEASUREMENTS.
Creator: VICTOR, ALAN MICHAEL., Florida Atlantic University, Gazourian, Martin G., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: A design theory for high frequency oscillators is presented. Emphasis is placed on oscillator design techniques which are applicable to the electrical tuning of LC and transmission line resonators. Attention is paid to design approaches which yield an oscillator with high spectral purity and a large signal to noise ratio. Theory and measurements demonstrate for the oscillator configurations investigated the a small L/C ratio is desirable for improved oscillator signal to noise ratio....
Show moreA design theory for high frequency oscillators is presented. Emphasis is placed on oscillator design techniques which are applicable to the electrical tuning of LC and transmission line resonators. Attention is paid to design approaches which yield an oscillator with high spectral purity and a large signal to noise ratio. Theory and measurements demonstrate for the oscillator configurations investigated the a small L/C ratio is desirable for improved oscillator signal to noise ratio. Equations are developed which define the noise figure the oscillator due to the additive noise of the active device. This analysis demonstrates the need for a high device starting transconductance which should be subsequently reduced during oscillation to minimize the device noise contribution. A relationship is developed between the receiver dynamic range and the oscillator signal to the noise ratio. Oscillator designs in the region 20 Mhz - 200 Mhz verify the analysis. A unified approach to large signal oscillator design is investigated and relationships to oscillator signal to noise ratio using the previously developed theory are noted
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Date Issued: 1980
PURL: http://purl.flvc.org/fcla/dt/14043
Subject Headings: Oscillators, Audio-frequency
Format: Document (PDF)

Title: BASIC NODAL ANALYSIS PROGRAMS WITH OPTIMIZATION, SENSITIVITY AND TOLERANCE ANALYSES.
Creator: TIMMONS, RICHARD PAUL., Florida Atlantic University, Graham, Peter, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: Collections of BASIC subroutines are developed to perform non-general circuit analyses. These subroutines are used to evaluate the manufacturability of a functionally trimmed thick film hybrid circuit. Nodal, sensitivity, and tolerance analyses are used to evaluate the effectiveness of the functional trim algorithm, and an optimization procedure to alter the nominal circuit parameter values for adequate margins. The computer programs are not user-interactive, and the user has to write a...
Show moreCollections of BASIC subroutines are developed to perform non-general circuit analyses. These subroutines are used to evaluate the manufacturability of a functionally trimmed thick film hybrid circuit. Nodal, sensitivity, and tolerance analyses are used to evaluate the effectiveness of the functional trim algorithm, and an optimization procedure to alter the nominal circuit parameter values for adequate margins. The computer programs are not user-interactive, and the user has to write a separate program to incorporate the various subroutines. The pro6rams are written for use on the HP9835A desktop computer. The component element types discussed are limited to resistors, capacitors, and voltage controlled current sources. Nodal analysis is performed by LU factorization techniques, and sensitivity analysis by the adjoint network approach. Circuit frequency response optimization is presented usiag the Fletcher Powell minimization procedure and quadratic polynomial fitting. A Monte Carlo tolerance analysis routine is developed.
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Date Issued: 1983
PURL: http://purl.flvc.org/fcla/dt/14162
Subject Headings: Thick-film circuits--Computer programs, Thick-film circuits--Testing
Format: Document (PDF)

Title: GENERALIZED PADE APPROXIMATION TECHNIQUES AND MULTIDIMENSIONAL SYSTEMS.
Creator: MESSITER, MARK A., Florida Atlantic University, Shamash, Yacov A., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: Two algorithms for greatest common factor (GCF) extraction from two multivariable polynomials, based on generalized Pade approximation, are presented. The reduced transfer matrices for two-dimensional (20) systems are derived from two 20 state-space models. Tests for product and sum separabilities of multivariable functions are also given.
Date Issued: 1983
PURL: http://purl.flvc.org/fcla/dt/14175
Subject Headings: Multivariate analysis, Padé approximant, Polynomials
Format: Document (PDF)

Title: THE DESIGN OF SWITCHED-CAPACITOR HIGHPASS FILTERS.
Creator: LEE, KING FU., Florida Atlantic University, Gazourian, Martin G., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: The design of high order switched-capacitor highpass filters is presented. Emphasis is placed on the design procedures of cascaded biquadratic sections and ladder network realizations of switchedcapacitor highpass filters. The stability problem of the doubly terminated switched-capacitor ladder highpass filter is discussed. Design examples are presented to illustrate the design procedures. The sensitivities of the realization methods are discussed. An .analytical equation of the gain...
Show moreThe design of high order switched-capacitor highpass filters is presented. Emphasis is placed on the design procedures of cascaded biquadratic sections and ladder network realizations of switchedcapacitor highpass filters. The stability problem of the doubly terminated switched-capacitor ladder highpass filter is discussed. Design examples are presented to illustrate the design procedures. The sensitivities of the realization methods are discussed. An .analytical equation of the gain deviation for the cascaded biquadratic sections realization is derived. Monte Carlo analysis is performed for the design examples. The results of the analyses are compared to reveal the differences in sensitivities in terms of the order of the filters and the type of realizations.
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Date Issued: 1983
PURL: http://purl.flvc.org/fcla/dt/14169
Subject Headings: Switched capacitor circuits, Digital filters (Mathematics)
Format: Document (PDF)

Title: PALSAM INPUT DATA FILE GENERATOR.
Creator: ROBINSON, WILLIAM ROBERT, JR., Florida Atlantic University, Marcovitz, Alan B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: The capabilities and limitations of Programmable Array Logic devices (PALs) are presented and compared to other logic devices. PALs are field programmable devices and a program called PALSAM exists to assist the designer in programming PALs. The attributes and limitations of PALSAM are discussed. The PALSAM Input Data File Generator program was written to eliminate many of the limitations of PALSAM. The need for an algorithmic method of reducing a general logic expression to a minimal sum-of...
Show moreThe capabilities and limitations of Programmable Array Logic devices (PALs) are presented and compared to other logic devices. PALs are field programmable devices and a program called PALSAM exists to assist the designer in programming PALs. The attributes and limitations of PALSAM are discussed. The PALSAM Input Data File Generator program was written to eliminate many of the limitations of PALSAM. The need for an algorithmic method of reducing a general logic expression to a minimal sum-of-products form is demonstrated. Several algorithms are discussed. The Zissos, Duncan and Jones Algorithm, which claims to produce a minimal sum-of-products expression but is presented without proof by its authors, is disproved by example. A modification of this algorithm is presented without proof. When tested in the 276 possible cases involving up to three variables, this new algorithm always produced a minimal sum-of-products expression, while the original algorithm failed in six of these cases. Finally, the PALSAM Input Data File Generator program which uses the modified algorithm is presented and documented.
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Date Issued: 1984
PURL: http://purl.flvc.org/fcla/dt/14199
Subject Headings: Programmable array logic, Microprocessors--Programming, Algorithms
Format: Document (PDF)

Title: THE DYNAMICS OF THE GENERALIZED MANIPULATOR.
Creator: LAU, TO-CHOI., Florida Atlantic University, Roth, Zvi S., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: The concept of "generalized manipulator" is introduced, and the closed form and recursive form dynamical models of the generalized manipulator are presented in Newton-Euler formulation. The physical meaning of each term in the dynamical model is explained. The dynamical models formulated by the Newton-Euler method and the Lagrangian-Euler method are proved equivalent. The dynamical model of the generalized manipulator is reduced to ordinary manipulators. The reduced dynamical model is shown...
Show moreThe concept of "generalized manipulator" is introduced, and the closed form and recursive form dynamical models of the generalized manipulator are presented in Newton-Euler formulation. The physical meaning of each term in the dynamical model is explained. The dynamical models formulated by the Newton-Euler method and the Lagrangian-Euler method are proved equivalent. The dynamical model of the generalized manipulator is reduced to ordinary manipulators. The reduced dynamical model is shown identical to existing models. Furthermore, the reduced dynamical model of the generalized manipulator can be used to compute forces and torques components along any direction. Application of the model to problems of mobile robots and flexible manipulators is shown.
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Date Issued: 1985
PURL: http://purl.flvc.org/fcla/dt/14243
Subject Headings: Manipulators (Mechanism), Robots
Format: Document (PDF)

Title: HELIUM SPEECH PROCESSING BY LINEAR PREDICTION METHOD.
Creator: LEE, HYUN JICK., Florida Atlantic University, Erdol, Nurgun, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: The human speech production system is reviewed through general acoustic theory. Based upon that, the characteristics of helium speech is compared to normal speech. The Linear Prediction algorithm is derived for computer implementation by recursive formulas. The correction factors for the vocal tract area functions are found from simulated helium speech and normal speech data for four vowels. By the correction factors, new corrected area functions are applied to the Linear Prediction algorithm...
Show moreThe human speech production system is reviewed through general acoustic theory. Based upon that, the characteristics of helium speech is compared to normal speech. The Linear Prediction algorithm is derived for computer implementation by recursive formulas. The correction factors for the vocal tract area functions are found from simulated helium speech and normal speech data for four vowels. By the correction factors, new corrected area functions are applied to the Linear Prediction algorithm so that new synthesis filters can be built. The output of the algorithm is enhanced helium speech.
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Date Issued: 1985
PURL: http://purl.flvc.org/fcla/dt/14244
Subject Headings: Acoustical engineering, Underwater acoustics
Format: Document (PDF)

Title: OSCILLATOR NOISE REDUCTION THROUGH THE USE OF NEGATIVE FEEDBACK.
Creator: KALTENECKER, ROBERT S., Florida Atlantic University, Graham, Peter, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: It has been conjectured that the addition of negative feedback in an oscillator can reduce the noise generated at frequencies close to the oscillation frequency f0. In this thesis the noise of a bipolar transistor used in a Hartley oscillator configuration is measured for different values of unbypassed emitter resistance. It is found that the noise is substantially reduced as the negative feedback introduced by the emitter resistance is increased. A detailed noise analysis is included, the...
Show moreIt has been conjectured that the addition of negative feedback in an oscillator can reduce the noise generated at frequencies close to the oscillation frequency f0. In this thesis the noise of a bipolar transistor used in a Hartley oscillator configuration is measured for different values of unbypassed emitter resistance. It is found that the noise is substantially reduced as the negative feedback introduced by the emitter resistance is increased. A detailed noise analysis is included, the results of which predict t he observed reduction in the oscillator noise. The oscillation frequency of the test oscillator is approximately 50 Mhz, but the results are general and can be applied at any frequency. Included are two listings of computer programs that were u sed to perform the noise analysis.
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Date Issued: 1985
PURL: http://purl.flvc.org/fcla/dt/14278
Subject Headings: Feedback (Electronics), Noise--Measurement
Format: Document (PDF)

Title: A MAINTENANCE PROCESSOR FOR THE IBM SERIES/1 (SERVICE, DIAGNOSTIC).
Creator: MURPHY, DAVID JAMES, III., Florida Atlantic University, Fernandez, Eduardo B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: As the Series/1 is used in more complex, unattended, or critical applications, users of the product cannot tolerate the mean time to repair of the current field service support. Long waits for technicians to arrive, troubleshoot the system, and repair or replace parts are no longer acceptable. This thesis presents the system architecture and functional capabilities of a maintenance processor for the Series/1. The maintenance processor designed herein can be used as the focal point of most...
Show moreAs the Series/1 is used in more complex, unattended, or critical applications, users of the product cannot tolerate the mean time to repair of the current field service support. Long waits for technicians to arrive, troubleshoot the system, and repair or replace parts are no longer acceptable. This thesis presents the system architecture and functional capabilities of a maintenance processor for the Series/1. The maintenance processor designed herein can be used as the focal point of most system support activities. This approach has been used in mainframe systems for some time but has not, in the past, been deemed feasible for smaller systerns such as the Series/1. This effort demonstrates the feasibility of a maintenance processor in such systems, resulting in a simplification of hardware and software while providing a significant improvement in total system reliability, availability, and serviceability.
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Date Issued: 1985
PURL: http://purl.flvc.org/fcla/dt/14248
Subject Headings: IBM Series/1 (Computer), Software maintenance
Format: Document (PDF)

Title: MULTI-LEVEL FLOW CONTROL IN COMPUTER NETWORKS (SIMULATION).
Creator: ROY, KAUSHIK., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: Several different flow control methods for computer communications networks have been analyzed in this thesis. Isarithmic, end-to-end, and link level flow control have been dealt with in detail. A simulation program has been written to compare the performance of these flow control techniques. It has been found that the system performance of computer networks degrades at high values of data traffic when no flow control is implemented. This is due to congestion and buffer overflow problem. One...
Show moreSeveral different flow control methods for computer communications networks have been analyzed in this thesis. Isarithmic, end-to-end, and link level flow control have been dealt with in detail. A simulation program has been written to compare the performance of these flow control techniques. It has been found that the system performance of computer networks degrades at high values of data traffic when no flow control is implemented. This is due to congestion and buffer overflow problem. One flow control technique when implemented alone does not generally produce optimal results. A judicious mixture of several flow control techniques should be implemented together so as to get the desired throughput and delay performance in a computer communication network. The simulation program is quite versatile. It uses the eventscheduling method for faster computation. Several simulation results have been presented to illustrate the effects of multi-level flow on delay and throughput performance of a network under different traffic load conditions.
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Date Issued: 1985
PURL: http://purl.flvc.org/fcla/dt/14286
Subject Headings: Computer networks--Testing, Computer networks--Evaluation
Format: Document (PDF)

Title: SIMULATION STUDY OF TOKEN-PASSING BUS LOCAL AREA NETWORK.
Creator: RAO, SUHAS PALAKURTI., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: This thesis deals with simulation of a conflict-free token-passing protocol for local area bus networks. The primary emphasis of this simulation study is to observe the effects of token holding time on the performance of the network. Token holding time is adjusted to account for three types of service disciplines: purely non-exhaustive, non-exhaustive and exhaustive. Network performance for these three service disciplines is compared to determine, which one of the three gives a relatively...
Show moreThis thesis deals with simulation of a conflict-free token-passing protocol for local area bus networks. The primary emphasis of this simulation study is to observe the effects of token holding time on the performance of the network. Token holding time is adjusted to account for three types of service disciplines: purely non-exhaustive, non-exhaustive and exhaustive. Network performance for these three service disciplines is compared to determine, which one of the three gives a relatively better performance. Besides throughput and delay, a more compact form of performance measure called "power", has also been used in this study. Power is simply a ratio of throughput and delay. This study has shown that the token holding time has significant effect on the performance of a local area network. Simulation results of this study, are presented in terms of throughput, delay, power, logical ring size, token circulation time, efficiency/overhead versus offered load and token holding time. Some results are also presented in terms of histograms.
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Date Issued: 1985
PURL: http://purl.flvc.org/fcla/dt/14275
Subject Headings: Local area networks (Computer networks)
Format: Document (PDF)

Title: ANALYSIS AND COMPARISON OF THE RELEASE WHEN DONE AND RELEASE ON REQUEST BUS ARBITRATION METHODS (MAKOV CHAIN, MULTIPROCESSOR, BUS MASTER).
Creator: SINIBALDI, JOHN CLAUDE., Florida Atlantic University, Marcovitz, Alan B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: A comparative analysis of two methods of bus arbitration used by a multiprocessing system with a single main bus is performed. The major performance parameters are delay time and the average number of active processors, called processing power. The bus arbitration methods are described using state and timing diagrams. Multiprocessor systems using these methods of arbitration are then modeled using Markov chains to enable the formulation of processing power. From processing power other...
Show moreA comparative analysis of two methods of bus arbitration used by a multiprocessing system with a single main bus is performed. The major performance parameters are delay time and the average number of active processors, called processing power. The bus arbitration methods are described using state and timing diagrams. Multiprocessor systems using these methods of arbitration are then modeled using Markov chains to enable the formulation of processing power. From processing power other performance parameters can be derived. A comparison is then made among the two bus arbitration methods based on the analytical results where processors access the bus at an equal rate. Simulations of multiprocessor systems using either of the two arbitration methods were performed to validate the analytical models for equal bus request rates. Simulations are also performed of a system of processors using the main bus at unequal rates.
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Date Issued: 1986
PURL: http://purl.flvc.org/fcla/dt/14350
Subject Headings: Multiprocessors, System design
Format: Document (PDF)

Title: DESIGN/IMPLEMENTATION OF AN EXPERT SYSTEM USING A DATA BASE MANAGEMENT SYSTEM ARCHITECTURE IN DEVELOPMENT OF ITS INFERENCE ENGINE.
Creator: LABOONE, PERRY ALLEN., Florida Atlantic University, Hoffman, Frederick, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: The subject of this thesis is the design and implement at ion of an expert system from a standard data base management software language. The advantages and limitations of such a system design are discussed and supported by an accompanying implementation. Both, the design and implementation, demonstrate what gives the expertise or personification of human reasoning to a machine and why this type of reasoning is well suited to certain types of problems. This fundamental departure from...
Show moreThe subject of this thesis is the design and implement at ion of an expert system from a standard data base management software language. The advantages and limitations of such a system design are discussed and supported by an accompanying implementation. Both, the design and implementation, demonstrate what gives the expertise or personification of human reasoning to a machine and why this type of reasoning is well suited to certain types of problems. This fundamental departure from traditional deterministic analytical problem solving is accomplished by developing a system that is heuristic in nature. This heuristic implementation provides for a system that assists in the development of an emerging solution, rather than a deterministic solution in and of itself (i.e., a system that is programmed with a set of meta-knowledge rules that governs the decision making process and acts upon a second set of knowledge rules).
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Date Issued: 1986
PURL: http://purl.flvc.org/fcla/dt/14349
Subject Headings: Expert systems (Computer science), Systems design
Format: Document (PDF)

Title: NEIGHBORING NEAR MINIMUM-TIME CONTROLS WITH DISCONTINUITIES AND THE APPLICATION TO THE CONTROL OF MANIPULATORS (PATH-PLANNING, TRACKING, FEEDBACK).
Creator: Zhuang, Hanqi, Florida Atlantic University, Hamano, Fumio, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: This thesis presents several algorithms to treat the problem of closed-loop near minimum-time controls with discontinuities. First, a neighboring control algorithm is developed to solve the problem in which controls are bounded by constant constraints. Secondly, the scheme is extended to account for state-dependent control constraints. And finally, a path tracking algorithm for robotic manipulators is presented, which is also a neighboring control algorithm. These algorithms are suitable for...
Show moreThis thesis presents several algorithms to treat the problem of closed-loop near minimum-time controls with discontinuities. First, a neighboring control algorithm is developed to solve the problem in which controls are bounded by constant constraints. Secondly, the scheme is extended to account for state-dependent control constraints. And finally, a path tracking algorithm for robotic manipulators is presented, which is also a neighboring control algorithm. These algorithms are suitable for real time controls because the on-line computations involved are relatively simple. Simulation results show that these algorithms work well despite the fact that the prescribed final points can not be reached exactly.
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Date Issued: 1986
PURL: http://purl.flvc.org/fcla/dt/14326
Subject Headings: Manipulators (Mechanism), Control theory, Algorithms
Format: Document (PDF)

Title: PERFORMANCE EVALUATION OF THE EFFECTS OF MESSAGE SEGMENTATION IN TANDEM NODE COMPUTER NETWORKS.
Creator: LAMANNA, PETER JOHN., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: Analytical and simulation performance evaluation results are presented on the effects of message segmentation and the validity of the Independence Assumption when applied to analytically modeling tandem node computer networks. Simulation results indicate that increasing message segmentation threshold will increase the network traffic intensity and consequently the total packet delay. Simulation and analytical results for total packet delay compared well only at low traffic intensities. At...
Show moreAnalytical and simulation performance evaluation results are presented on the effects of message segmentation and the validity of the Independence Assumption when applied to analytically modeling tandem node computer networks. Simulation results indicate that increasing message segmentation threshold will increase the network traffic intensity and consequently the total packet delay. Simulation and analytical results for total packet delay compared well only at low traffic intensities. At higher traffic intensities the discrepancy is due to the Independence Assumption since it does not account for the increasing dependency of interarrival times and service times as packets are made to wait at the nodes.
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Date Issued: 1986
PURL: http://purl.flvc.org/fcla/dt/14327
Subject Headings: Computer networks, Data transmission systems
Format: Document (PDF)

Title: PRECISION TC SYSTEM FOR MEASURING ACTIVITY DIPS OF QUARTZ CRYSTALS.
Creator: Peterson, Vance Howard, Florida Atlantic University, Graham, Peter, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: There is an increasing market demand for quartz crystals which exhibit minimal activity dip or frequency anomalies over a predefined temperature range. Characterization of the frequency vs temperature (f-T) activity dip profiles of these tight tolerance crystals is best carried out using a system which has been expressly designed for such a purpose. Frequency measurement accuracy and reliable temperature control must be established in the system, along with its being compatible with a...
Show moreThere is an increasing market demand for quartz crystals which exhibit minimal activity dip or frequency anomalies over a predefined temperature range. Characterization of the frequency vs temperature (f-T) activity dip profiles of these tight tolerance crystals is best carried out using a system which has been expressly designed for such a purpose. Frequency measurement accuracy and reliable temperature control must be established in the system, along with its being compatible with a computer controlled production or engineering enviornment. This thesis will present design and implementation details for a system with the aformentioned objective of enabling the generation of accurate crystal activity dip data. The system will provide the user with up-to-date facilities for meeting the temperature testing requirements of tight tolerance crystals.
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Date Issued: 1986
PURL: http://purl.flvc.org/fcla/dt/14343
Subject Headings: Quartz crystals, Oscillators, Crystal
Format: Document (PDF)

Title: PERFORMANCE EVALUATION OF A RIDGE 32 COMPUTER SYSTEM (RISC (REDUCED INSTRUCTION SET COMPUTER)).
Creator: YOON, SEOK TAE., Florida Atlantic University, Fernandez, Eduardo B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: As a new trend in designing a computer architecture, Reduced Instruction set Computers(RISC) have been proposed recently. This thesis reviews the new design approach behind the RISC and discuss the controversy between the proponents of the RISC approach and those of the traditional Complex Instruction set COmputer(CISC) approach. Ridge 32 is selected as a case study of the RISCs. Architectural parameters to evaluate the computer performance are considered to analyze the performance of the...
Show moreAs a new trend in designing a computer architecture, Reduced Instruction set Computers(RISC) have been proposed recently. This thesis reviews the new design approach behind the RISC and discuss the controversy between the proponents of the RISC approach and those of the traditional Complex Instruction set COmputer(CISC) approach. Ridge 32 is selected as a case study of the RISCs. Architectural parameters to evaluate the computer performance are considered to analyze the performance of the Ridge 32. A simulator for the Ridge 32 was implemented in PASCAL as a way of measuring those parameters. Measurement results on the several selected benchmark programs are given and analyzed to evaluate the characteristics of the Ridge 32.
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Date Issued: 1986
PURL: http://purl.flvc.org/fcla/dt/14348
Subject Headings: Computer architecture, Microprocessors
Format: Document (PDF)

Title: OPTIMAL SCHEDULING OF PROCESSES FOR A NETWORK OF TRANSPUTERS (MULTIPROCESSOR, OCCAM, CONCURRENT PROCESSING).
Creator: NGO, TON ANH., Florida Atlantic University, Fernandez, Eduardo B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: Concurrency at both the hardware and software level has recently been considered as the solution to the classic Von Neuman bottleneck in system design. Introduced by Inmos, the Occam language and the Transputer microprocessor provide simple and elegant building blocks for a concurrent system. This thesis proposes a set of algorithms to find an optimal deterministic schedule for an Occam program executed on a network of Transputers. Also discussed are features of the network relevant to the...
Show moreConcurrency at both the hardware and software level has recently been considered as the solution to the classic Von Neuman bottleneck in system design. Introduced by Inmos, the Occam language and the Transputer microprocessor provide simple and elegant building blocks for a concurrent system. This thesis proposes a set of algorithms to find an optimal deterministic schedule for an Occam program executed on a network of Transputers. Also discussed are features of the network relevant to the problem of scheduling, and a complete example is provided to illustrate the scheduler. The approaches described can be used as a basis for implementing a flexible general purpose multiprocessor system.
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Date Issued: 1986
PURL: http://purl.flvc.org/fcla/dt/14351
Subject Headings: Multiprocessors, Computer networks
Format: Document (PDF)

Title: GENERIC NETWORK EXECUTIVE.
Creator: SARMIENTO, JESUS LEOPOLDO., Florida Atlantic University, Fernandez, Eduardo B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description: A Generic Network Executive (GNE) package is presented in this thesis. It encompasses the strategy and methodology to follow when implementing data communication software. GNE was designed for portability and high utilization of available resources (efficiency). It does not impose implementation constraints because it does not include features specific to any system (hardware or operating system}. It uses a highly concurrent process model with a pipelined structure . It is not protocol...
Show moreA Generic Network Executive (GNE) package is presented in this thesis. It encompasses the strategy and methodology to follow when implementing data communication software. GNE was designed for portability and high utilization of available resources (efficiency). It does not impose implementation constraints because it does not include features specific to any system (hardware or operating system}. It uses a highly concurrent process model with a pipelined structure . It is not protocol dependent, rather it is meant to be used to implement low level services for higher level communic ation protocols. It is intended to provide interprocess communication in distributed systems by coupling application programs with a general purpose packet delivery system, i.e., a datagram service.
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Date Issued: 1986
PURL: http://purl.flvc.org/fcla/dt/14321
Subject Headings: Computer networks, Data transmission systems
Format: Document (PDF)

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