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interlaced pixel delta codec: For transmission of video on low bit rate communication lines
Title
The interlaced pixel delta codec: For transmission of video on low bit rate communication lines.
Creator
Celi, Joseph, Jr., Florida Atlantic University, Furht, Borko, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
The Interlaced Pixel Delta (IPD) Video Codec is a real time video compression and decompression engine. It is specifically designed to be used for video phone or video conferencing applications that are to be run under very low bandwidth networking conditions. The example network used throughout this dissertation is the Internet where users are typically connected at transmission speeds of 33.3 K bits per second or less. In order to accomplish this goal, the IPD codec must achieve very high...
Show moreThe Interlaced Pixel Delta (IPD) Video Codec is a real time video compression and decompression engine. It is specifically designed to be used for video phone or video conferencing applications that are to be run under very low bandwidth networking conditions. The example network used throughout this dissertation is the Internet where users are typically connected at transmission speeds of 33.3 K bits per second or less. In order to accomplish this goal, the IPD codec must achieve very high compression ratios. This feat is further complicated by the fact that the IPD codec is to be fully realized using a software approach in order to be considered a viable solution for the average Internet user. The demonstrated test results show that the IPD codec is capable of achieving these ambitious goals. The IPD compressor operates in a pipelined manner. Each stage in the IPD compression pipeline has its own complexities and challenges, which are individually addressed in detail. The ultimate goal of the IPD compressor is to maintain a constant compression ratio that is sufficiently high enough to allow bi-directional video communication to take place across low bandwidth transmission lines. These compression ratios must be achieved using a software compressor and decompressor. Strict CPU utilization requirements must be met by the IPD codec in order for it to be able to operate in real time. The IPD compressor defines a unique video interlacing scheme to sample the pixels that comprise the incoming video frames. The properties of the interlacing schemes aid the video compressor in its quest for high compression ratios. Later in the decompression stage, the IPD decompressor uses the properties of the interlacing schemes to reverse the sampling process to bring back the original picture quality. The IPD compressor also employs a custom variation of the error diffusion algorithm in its color reduction phase. A pixel delta algorithm is used to build a new frame from a previous frame. The pixel delta algorithm defines a unique bitmask representation of pixel locations that are flagged for refresh. These pixel locations will be used to build a subsequent frame. The bitmask representation of pixel locations is further compressed using a variation of the Huffman compression algorithm. An IPD delta frame is built by the IPD compressor. The IPD delta frame contains a header, the compressed bitmask of pixel locations flagged for change and the actual compressed pixel intensity values used used to build a new frame from a previous frame. The IPD decompressor also operates in a pipelined manner. The IPD decompressor also has strict requirements with respect to CPU utilization. The IPD decompressor applies several image processing algorithms to the video output stream in order to enhance the visual quality of the reconstructed output video frames. Custom test programs are used to derive and validate the algorithms presented in this dissertation. A working prototype of the complete IPD codec is also presented to aid in the visual analysis of the final video picture quality.
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Date Issued
1998
PURL
http://purl.flvc.org/fcla/dt/12573
Subject Headings
Internet videoconferencing, Video telephone, Image transmission
Format
Document (PDF)
Performance analysis of a new object-based I/O architecture for PCs and workstations
Title
Performance analysis of a new object-based I/O architecture for PCs and workstations.
Creator
Huynh, Khoa Dang., Florida Atlantic University, Khoshgoftaar, Taghi M., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
In this dissertation, an object-based I/O architecture for personal computers (PCs) and workstations is proposed. The proposed architecture allows the flexibility of having I/O processing performed as much as possible by intelligent I/O adapters, or by the host processor, or by any processor in the system, depending on application requirements and underlying hardware capabilities. It keeps many good features of current I/O architectures, while providing more flexibility to take advantage of...
Show moreIn this dissertation, an object-based I/O architecture for personal computers (PCs) and workstations is proposed. The proposed architecture allows the flexibility of having I/O processing performed as much as possible by intelligent I/O adapters, or by the host processor, or by any processor in the system, depending on application requirements and underlying hardware capabilities. It keeps many good features of current I/O architectures, while providing more flexibility to take advantage of new hardware technologies, promote architectural openness, provide better performance and higher reliability. The proposed architecture introduces a new definition of I/O subsystems and makes use of concurrent object-oriented technology. It combines the notions of object and thread into something called an active object. All concurrency abstractions required by the proposed architecture are provided through external libraries on top of existing sequential object-oriented languages, without any changes to the syntax and semantics of these languages. We also evaluate the performance of optimal implementations of the proposed I/O architecture against other I/O architectures in three popular, PC-based, distributed environments: network file server, video server, and video conferencing. Using the RESearch Queueing Modeling Environment (RESQME), we have developed detailed simulation models for various implementations of the proposed I/O architecture and two other existing I/O architectures: a conventional, interrupt-based I/O architecture and a peer-to-peer I/O architecture. Our simulation results indicate that, on several different hardware platforms, the proposed I/O architecture outperforms both existing architectures in all three distributed environments considered.
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Date Issued
1994
PURL
http://purl.flvc.org/fcla/dt/12386
Subject Headings
Local area networks (Computer networks), Computer input-output equipment, Computer networks, Videoconferencing, Client/server computing, Object-oriented programming (Computer science)
Format
Document (PDF)