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Distributed processing tools for autonomous underwater vehicles
Title
Distributed processing tools for autonomous underwater vehicles.
Creator
Jade, Prashanth., Florida Atlantic University, Ganesan, Krishnamurthy
Abstract/Description
Software for Autonomous Underwater Vehicles (AUVs) is usually complex. It involves several complicated tasks such as controller, path planner, map builder, and sensor processor. Distributed processing is unavoidable for such a complex software system with real-time response requirements. Once these processes are distributed over several computers, it is essential that they have some mechanism to communicate to each other to share information. Each process might communicate with several of the...
Show moreSoftware for Autonomous Underwater Vehicles (AUVs) is usually complex. It involves several complicated tasks such as controller, path planner, map builder, and sensor processor. Distributed processing is unavoidable for such a complex software system with real-time response requirements. Once these processes are distributed over several computers, it is essential that they have some mechanism to communicate to each other to share information. Each process might communicate with several of the other processes. Interprocess communication becomes an important issue. This thesis discusses the design and implementation of a generic distributed toolkit that facilitates the development of distributed software for AUVs. This toolkit makes the details ofinterprocess communication transparent to the programmers involved in the AUV software development. The toolkit provides efficient direct communication between processes and does not impose any constraints on the architecture of the distributed software. Conventional techniques for monitoring/debugging of sequential programs are not applicable for distributed processes. This is because the correctness of a real-time distributed program is determined not only by its "logical" correctness but also its "timing" correctness. Monitoring mainly comprises of observation of the system during its operation. Debugging is mostly a graphical "post-mortem" analyses of the dumps generated by the distributed program. This thesis also presents the design of a window based generic graphical monitoring/ debugging tool.
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Date Issued
1992
PURL
http://purl.flvc.org/fcla/dt/14871
Subject Headings
Submersibles, Electronic data processing--Distributed processing, Real-Time data processing, Debugging in computer science
Format
Document (PDF)
architectural and performance characterization of distributed real-time systems
Title
An architectural and performance characterization of distributed real-time systems.
Creator
Huynh, Khoa Dang., Florida Atlantic University, Fernandez, Eduardo B.
Abstract/Description
We propose a methodology to effectively characterize the architecture and system performance of distributed systems designed to operate in frame-based real-time environments. Important characteristics that define the real-time performance of a distributed system are identified and classified at the hardware, operating system, and user application levels. A synthetic workload model, called the Distributed Real-Time Workload (DRTW), is designed to fully characterize a broad range of real-time...
Show moreWe propose a methodology to effectively characterize the architecture and system performance of distributed systems designed to operate in frame-based real-time environments. Important characteristics that define the real-time performance of a distributed system are identified and classified at the hardware, operating system, and user application levels. A synthetic workload model, called the Distributed Real-Time Workload (DRTW), is designed to fully characterize a broad range of real-time applications and to exercise a single- or multiple-node distributed system under measurement. A set of data collection tools to obtain empirical performance data at different levels of a distributed system is also proposed. For the purpose of illustration, these tools are used to obtain data on several real-time systems from Encore Computer Corporation.
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Date Issued
1990
PURL
http://purl.flvc.org/fcla/dt/14665
Subject Headings
Electronic data processing--Distributed processing, Real-time data processing
Format
Document (PDF)
Realization and implementation of separable-in-denominator two-dimensional digital filter
Title
Realization and implementation of separable-in-denominator two-dimensional digital filter.
Creator
Huang, Ziqiang., Florida Atlantic University, Zilouchian, Ali
Abstract/Description
In this thesis, a partial fraction expansion of a separable-in-denominator 2-D transfer function is given. Based on this expansion, several novel realizations of separable-in-denominator 2-D filter are provide. These realizations have the properties of highly parallel structure and improved throughput delay. The performance figures are given in the tables. A method of evaluation of quantization error of separable-in-denominator 2-D filter is also derived by using the residue method. Formulas...
Show moreIn this thesis, a partial fraction expansion of a separable-in-denominator 2-D transfer function is given. Based on this expansion, several novel realizations of separable-in-denominator 2-D filter are provide. These realizations have the properties of highly parallel structure and improved throughput delay. The performance figures are given in the tables. A method of evaluation of quantization error of separable-in-denominator 2-D filter is also derived by using the residue method. Formulas for calculation of roundoff noise of proposed structures are provided. Two programs which can be used to calculate the roundoff noise of proposed structure are listed in the Appendix. To run the programs, we need only to input the constant coefficients of expanded transfer function. At last, an optimal block realization of separable-in-denominator 2-D filter is discussed and the criterion for the absence of limit cycles for a second-order 2-D block is given.
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Date Issued
1992
PURL
http://purl.flvc.org/fcla/dt/14879
Subject Headings
Real-time data processing, Image processing--Digital techniques, Electric filters, Digital--Computer programs
Format
Document (PDF)
Fuzzycuda
Title
Fuzzycuda: interactive matte extraction on a GPU.
Creator
Gibson, Joel, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
Natural matte extraction is a difficult and generally unsolved problem. Generating a matte from a nonuniform background traditionally requires a tediously hand drawn matte. This thesis studies recent methods requiring the user to place only modest scribbles identifying the foreground and the background. This research demonstrates a new GPU-based implementation of the recently introduced Fuzzy- Matte algorithm. Interactive matte extraction was achieved on a CUDA enabled G80 graphics processor....
Show moreNatural matte extraction is a difficult and generally unsolved problem. Generating a matte from a nonuniform background traditionally requires a tediously hand drawn matte. This thesis studies recent methods requiring the user to place only modest scribbles identifying the foreground and the background. This research demonstrates a new GPU-based implementation of the recently introduced Fuzzy- Matte algorithm. Interactive matte extraction was achieved on a CUDA enabled G80 graphics processor. Experimental results demonstrate improved performance over the previous CPU based version. In depth analysis of experimental data from the GPU and the CPU implementations are provided. The design challenges of porting a variant of Dijkstra's shortest distance algorithm to a parallel processor are considered.
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Date Issued
2008
PURL
http://purl.flvc.org/FAU/186288
Subject Headings
Computer graphics, Scientific applications, Information visualization, High performance computing, Real-time data processing
Format
Document (PDF)
Processor allocation in hypercube computers
Title
Processor allocation in hypercube computers.
Creator
Sua, Jose Reinier., Florida Atlantic University, Mahgoub, Imad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
In this thesis, processor allocation in hypercube computers is viewed to consist of the following three components. The ability to have complete subcube recognition, the heuristics and methods to speedup the recognition of free subcubes, and the policy to schedule incoming tasks to reduce the fragmentation of the hypercube. We propose a fast processor allocation strategy for hypercube computers called modified gray code (MGC). The MGC strategy achieves full subcube recognition with much less...
Show moreIn this thesis, processor allocation in hypercube computers is viewed to consist of the following three components. The ability to have complete subcube recognition, the heuristics and methods to speedup the recognition of free subcubes, and the policy to schedule incoming tasks to reduce the fragmentation of the hypercube. We propose a fast processor allocation strategy for hypercube computers called modified gray code (MGC). The MGC strategy achieves full subcube recognition with much less complexity than the multiple gray code and the tree collapse strategies. It is the first bitmapped strategy to incorporate binary search and heuristics to locate free subcubes, and has a new scheduling policy which significantly reduces the fragmentation of the hypercube. Simulation programs have been developed to compare the performance of the MGC to that of the other strategies so as to demonstrate its effectiveness. Results obtained showed that, in most of the situations, the MGC outperformed the other strategies, especially when the system load is high. We have also investigated processor allocation methods for real-time systems with fault-tolerant considerations. We propose methods that can handle a minimum of two dynamically occurring faults, without slowdown in execution and with a constant slowdown in communication of 3.
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Date Issued
1993
PURL
http://purl.flvc.org/fcla/dt/14904
Subject Headings
Hypercube networks (Computer networks), Computer architecture, Real-time data processing
Format
Document (PDF)
Extensions to real-time object-oriented software design methodologies
Title
Extensions to real-time object-oriented software design methodologies.
Creator
Woodcock, Timothy G., Florida Atlantic University, Fernandez, Eduardo B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
Real-time systems are systems where time is considered a system resource that needs to be managed. Time is usually represented in these systems as a deadline to complete a task. Unfortunately, by adding timing to even simple algorithms, it complicates them greatly. Real-time systems are by nature difficult and complex to understand. Object-oriented methodologies have attributes that allow real-time systems to be designed and implemented with less error and some control over the resultant...
Show moreReal-time systems are systems where time is considered a system resource that needs to be managed. Time is usually represented in these systems as a deadline to complete a task. Unfortunately, by adding timing to even simple algorithms, it complicates them greatly. Real-time systems are by nature difficult and complex to understand. Object-oriented methodologies have attributes that allow real-time systems to be designed and implemented with less error and some control over the resultant complexity. With object-oriented design, the system is modeled in the environment that it will be used in. Objects themselves, are partitions of the system, into logical, understandable units. In this dissertation, we start by surveying the current real-time object-oriented design methodologies. By comparing these methodologies and developing a set of criteria for evaluating them, we discover that certain aspects of these methodologies still need some work. The most important aspects of the methodologies are understanding the effects of deadlines on statechart behavioral models and understanding the effects of deadlines when object models are inherited or undergo aggregation. The effects of deadlines on statecharts are then explored in detail. There are two basic ways that deadlines are added to statecharts. The first, and most popular, is adding timing as a condition on a state transition. The second is adding a count down timer to a state and forcing a transition if the timer reaches zero. We show that these are equivalent and can be used interchangeably to simplify designs. Next, the effects of deadlines on behavior models when the corresponding object models undergo inheritance or aggregation are studied. We will first analyze the effects on the behavior model when object inheritance is encountered. We found eight ways that the behavior model can be modified and still maintain the properties of inheritance. Finally, deadlines are added and the analysis is repeated.
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Date Issued
1996
PURL
http://purl.flvc.org/fcla/dt/12493
Subject Headings
Real-time data processing, Computer software--Development, Object-oriented programming (Computer science)
Format
Document (PDF)
ultrareliable multicomputer architecture for real time control applications
Title
An ultrareliable multicomputer architecture for real time control applications.
Creator
Buechler, Peter Charles., Florida Atlantic University, Fernandez, Eduardo B.
Abstract/Description
This thesis considers the design of ultrareliable multicomputers for control applications. The fault tolerance problem is divided into three subproblems: software, processing node, and communication fault tolerance. Design is performed using layers of abstraction, with fault tolerance implemented by dedicated layers. For software fault tolerance, new constructs for concurrent n-version programming are introduced. For processing node fault tolerance, the distributed fault tolerance (DFT)...
Show moreThis thesis considers the design of ultrareliable multicomputers for control applications. The fault tolerance problem is divided into three subproblems: software, processing node, and communication fault tolerance. Design is performed using layers of abstraction, with fault tolerance implemented by dedicated layers. For software fault tolerance, new constructs for concurrent n-version programming are introduced. For processing node fault tolerance, the distributed fault tolerance (DFT) concept of Chen and Chen is extended to allow for arbitrary failures. Communication fault tolerance is achieved with multicasting on a fault-tolerant graph (FG) network. Reliability models are developed for each of the layers, and a performance model is developed for the communication layer. An example flight control system is compared to currently existing architectures.
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Date Issued
1989
PURL
http://purl.flvc.org/fcla/dt/14573
Subject Headings
Computers--Reliability, Fault-tolerant computing, Real-time data processing, Flight control
Format
Document (PDF)
Industrial-strength formalization of object-oriented real-time systems
Title
Industrial-strength formalization of object-oriented real-time systems.
Creator
Raghavan, Gopalakrishna., Florida Atlantic University, Larrondo-Petrie, Maria M., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
The goal of this dissertation is to propose an industrial-strength formal model for object-oriented real-time systems that captures real-time constraints using industry standard notations and tools. A light-weight formalization process is proposed that is semi-formal, graphical and easier to read and understand. This process supports formal behavior analysis, verification and validation. It is very effective in early detection of incompleteness and ambiguities in the specifications. The...
Show moreThe goal of this dissertation is to propose an industrial-strength formal model for object-oriented real-time systems that captures real-time constraints using industry standard notations and tools. A light-weight formalization process is proposed that is semi-formal, graphical and easier to read and understand. This process supports formal behavior analysis, verification and validation. It is very effective in early detection of incompleteness and ambiguities in the specifications. The proposed process uses industry standard tools and fits well within stringent industrial schedules. Formal requirements analysis is conducted using High Level Message Sequencing Chart (HMSC) and Message Sequencing Chart (MSC). In the formal analysis phase, the static structures are modeled using Unified Modeling Language (UML) and the constraints are formalized using Object Constraint Language (OCL). System behavior is formally modeled using Specification and Description Language (SDL) during the formal design phase. SDL is used for behavior modeling due to wide commercial availability of SDL-based tools for formal behavior analysis and validation. Transition rules mapping from UML Class Diagrams and Statecharts to SDL models are proposed. SDL models are formally simulated and validated during the formal validation phase. Using the proposed process real-time clock, timer, periodic process, aperiodic process, resource and precedence constraints were formalized. Different types of timers, such as periodic, aperiodic, one-shot, fixed-interval and variable-interval timers are derived using inheritance models. Semaphore wait and signal operations are formalized as part of the resource constraint. Pre-conditions, post-conditions and invariants for the real-time constraints were captured using OCL. Behavior of the proposed models were captured using Statecharts. The proposed mapping rules were used to translate the behavior models to SDL. The SDL models were formally simulated and validated using Telelogic Software Development Tool (SDT). The tools allowed extensive model analysis and helped uncover several design flaws. The real-time constraints were stereotyped and packaged into reusable formal components. These components can be easily imported by applications. Two case studies, Cruise Control System and Bottle Filling System, are included to illustrate the use of the proposed process and the real-time package. The "industrial-strength" of the process was validated by utilizing the proposed process in an industrial project where it was found to accelerate the development process.
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Date Issued
2000
PURL
http://purl.flvc.org/fcla/dt/12632
Subject Headings
Object-oriented programming (Computer science), Real-time data processing, Formal methods (Computer science)
Format
Document (PDF)