Current Search: Parallel processing Electronic computers (x)
View All Items
 Title
 Parallel algorithms for domain load balance.
 Creator
 Huang, Hao., Florida Atlantic University, Wu, Jie
 Abstract/Description

To improve the performance of parallel/distributed systems, we propose four parallel load balance algorithms. The new partition algorithm achieves load balance among processors via domain partition. If we assume the problem domain is evenly load distributed, this algorithm will divide the whole domain into a required number of subdomains with the same area. If a problem domain has a dynamic load distribution, although the new partition algorithm is still suitable for the initial mapping, we...
Show moreTo improve the performance of parallel/distributed systems, we propose four parallel load balance algorithms. The new partition algorithm achieves load balance among processors via domain partition. If we assume the problem domain is evenly load distributed, this algorithm will divide the whole domain into a required number of subdomains with the same area. If a problem domain has a dynamic load distribution, although the new partition algorithm is still suitable for the initial mapping, we propose three dynamic load balance algorithms. These dynamic algorithms achieve load balance among processors by transferring load among processors. We applied the new partition algorithm to a specific domain and compared the method to some existing partition algorithms. We also simulated three dynamic load balance algorithms. Results of comparisons and simulations show that all the four algorithms have satisfactory performance.
Show less  Date Issued
 1997
 PURL
 http://purl.flvc.org/fcla/dt/15478
 Subject Headings
 Algorithms, Parallel processing (Electronic computers)
 Format
 Document (PDF)
 Title
 Parallel edge detector on cluster of workstations using message passing interfaces.
 Creator
 Patel, Nikul N., Florida Atlantic University, Mahgoub, Imad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

Many image processing applications can exploit high degree of data locality and parallelism to improve performance. Customized massively parallel computing hardware provides expensive but the most efficient solution as far as performance is concerned. Nowadays high bandwidth network with high performance workstations are becoming economical and are widely available. Hence, better performancetocost ratio can be achieved by implementing message passing paradigm of parallel processing....
Show moreMany image processing applications can exploit high degree of data locality and parallelism to improve performance. Customized massively parallel computing hardware provides expensive but the most efficient solution as far as performance is concerned. Nowadays high bandwidth network with high performance workstations are becoming economical and are widely available. Hence, better performancetocost ratio can be achieved by implementing message passing paradigm of parallel processing. Parallel edge detector was developed using message passing interfaces on cluster of workstations. This thesis discussed performance evaluation in terms of execution time, speedup, and efficiency for tasks with different computational intensities. Effects of sequential I/O component and load balancing are also discussed.
Show less  Date Issued
 1996
 PURL
 http://purl.flvc.org/fcla/dt/15252
 Subject Headings
 Computer interfaces, Parallel processing (Electronic computers)
 Format
 Document (PDF)
 Title
 Timestep optimal broadcasting in mesh networks with minimum total communication distance.
 Creator
 Cang, Songluan., Florida Atlantic University, Wu, Jie
 Abstract/Description

We propose a new minimum total communication distance (TCD) algorithm and an optimal TCD algorithm for broadcast in a 2dimensional mesh (2D mesh). The former generates a minimum TCD from a given source node, and the latter guarantees a minimum TCD among all the possible source nodes. These algorithms are based on a divideandconquer approach where a 2D mesh is partitioned into four submeshes of equal size. The source node sends the broadcast message to a special node called an eye in each...
Show moreWe propose a new minimum total communication distance (TCD) algorithm and an optimal TCD algorithm for broadcast in a 2dimensional mesh (2D mesh). The former generates a minimum TCD from a given source node, and the latter guarantees a minimum TCD among all the possible source nodes. These algorithms are based on a divideandconquer approach where a 2D mesh is partitioned into four submeshes of equal size. The source node sends the broadcast message to a special node called an eye in each submesh. The above procedure is then recursively applied in each submesh. These algorithms are extended to a 3dimensional mesh (3D mesh), and are generalized to a ddimensional mesh or torus. In addition, the proposed approach can potentially be used to solve optimization problems in other collective communication operations.
Show less  Date Issued
 1999
 PURL
 http://purl.flvc.org/fcla/dt/15647
 Subject Headings
 Computer algorithms, Parallel processing (Electronic computers), Computer architecture
 Format
 Document (PDF)
 Title
 Faulttolerant distributed shared memories.
 Creator
 Brown, Larry., Florida Atlantic University, Wu, Jie, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

Distributed shared memory (DSM) implements a sharedmemory programming interface on messagepassing hardware. The sharedmemory programming paradigm offers several advantages over the messagepassing paradigm. DSM is recognized as an important technology for massively parallel computing. However, as the number of processors in a system increases, the probability of a failure increases. To be widely useful, the DSM must be able to tolerate failures. This dissertation presents a method of...
Show moreDistributed shared memory (DSM) implements a sharedmemory programming interface on messagepassing hardware. The sharedmemory programming paradigm offers several advantages over the messagepassing paradigm. DSM is recognized as an important technology for massively parallel computing. However, as the number of processors in a system increases, the probability of a failure increases. To be widely useful, the DSM must be able to tolerate failures. This dissertation presents a method of implementing faulttolerant DSM (FTDSM) that is based on the idea of a snooper. The snooper monitors DSM protocol messages and keeps a backup of the current state of the DSM. The snooper can respond on behalf of failed processors. The snooperbased FTDSM is an improvement over existing FTDSMs because it is based on the efficient dynamic distributed manager DSM algorithm, does not require the repair of a failed processor in access the DSM, and does not query all nodes to rebuild the state of the DSM. Three snooperbased FTDSM systems are developed. The singlesnooper (SS) FTDSM has one snooper and is restricted to a broadcast network. Additional snoopers are added in the multiplesnooper (MS) FTDSM to improve performance. Twophase commit (2PC) protocols are developed to coordinate the activities of the snoopers, and a special data structure is used to store causality information to reduce the amount of snooper activity. Snooping is integrated with each processor in the integrated snooper (IS) FTDSM. The IS FTDSM is scalable because it is not restricted to a broadcast network. The concept of dynamic snooping is introduced for the IS FTDSM and several snooper migration algorithms are studied. Several recovery algorithms are developed to allow failed processors to rejoin the system. The properties of data structures used to locate owners and snoopers are studied and used to prove that the system can tolerate any single fault. A flexible method of integrating applicationlevel recovery with the FTDSM is presented, and a reliability analysis is conducted using a Markovchain modeling tool to show that the snooperbased FTDSM is a cost effective way to improve the reliability of DSM.
Show less  Date Issued
 1993
 PURL
 http://purl.flvc.org/fcla/dt/12349
 Subject Headings
 Faulttolerant computing, Electronic data processingDistributed processing, Parallel processing (Electronic computers), Computer networks
 Format
 Document (PDF)
 Title
 Massively parallel computation and porting of EPIC research hydro code on CrayT3D.
 Creator
 Dutta, Arindum., Florida Atlantic University, Tsai, ChiTay
 Abstract/Description

The objective of the work is to verify the feasibility of converting a large FEA code into a massively parallel FEA code in terms of computational speed and cost. Sequential subroutines in the Research EPIC hydro code, a Lagrangian finite element analysis code for high velocity elasticplastic impact problems, are individually converted into parallel code using Cray Adaptive Fortran (CRAFT). The performance of massively parallel subroutines running on 32 PEs on CrayT3D is faster than their...
Show moreThe objective of the work is to verify the feasibility of converting a large FEA code into a massively parallel FEA code in terms of computational speed and cost. Sequential subroutines in the Research EPIC hydro code, a Lagrangian finite element analysis code for high velocity elasticplastic impact problems, are individually converted into parallel code using Cray Adaptive Fortran (CRAFT). The performance of massively parallel subroutines running on 32 PEs on CrayT3D is faster than their sequential counterparts on CrayYMP. At next stage of the research, Parallel Virtual Machine (PVM) directives is used to develop a PVM version of the EPIC hydro code by connecting the converted parallel subroutines running on multiple PEs of T3D to the sequential part of the code running on single PE. With an incremental increase in the massively parallel subroutines into the PVM EPIC hydro code, the performance with respect to speedup of the code increased accordingly. The results indicate that significant speedup can be achieved in the EPIC hydro code when most or all of the subroutines are massively parallelized.
Show less  Date Issued
 1996
 PURL
 http://purl.flvc.org/fcla/dt/15249
 Subject Headings
 Parallel processing (Electronic computers), Computer programs, coding theory, Supercomputers
 Format
 Document (PDF)
 Title
 Massively parallel fault simulator.
 Creator
 Parigi, Eshwar V., Florida Atlantic University, Mazuera, Olga, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

Fault simulators can be used for various purposes, such as the determination of the Fault coverage, the Automatic test pattern generation and the preparation of the Fault dictionaries. As the size of the digital circuits increases, the number of gates present increases and the time taken for fault simulation also increases. In order to reduce the fault simulation time, massively parallel computers are being used. We have developed a fault simulator on MASPAR, a massively parallel Single...
Show moreFault simulators can be used for various purposes, such as the determination of the Fault coverage, the Automatic test pattern generation and the preparation of the Fault dictionaries. As the size of the digital circuits increases, the number of gates present increases and the time taken for fault simulation also increases. In order to reduce the fault simulation time, massively parallel computers are being used. We have developed a fault simulator on MASPAR, a massively parallel Single Instruction Multiple Data machine, based on the principles of parallel pattern parallel fault simulation. In order to eliminate the limitation of limited memory on MASPAR, we have designed an algorithm which reduces the amount of memory required for storing the circuit. We have implemented these algorithms in two different ways. These algorithms were tested on ISCAS85 benchmark circuits. The results have shown an improvement over other parallel algorithms.
Show less  Date Issued
 1994
 PURL
 http://purl.flvc.org/fcla/dt/15050
 Subject Headings
 Faulttolerant computing, Parallel processing (Electronic computers)
 Format
 Document (PDF)
 Title
 A new approach to the inverse kinematic analysis of redundant robots.
 Creator
 Dutta, Partha Sarathi., Florida Atlantic University
 Abstract/Description

A new approach has been developed for inverse kinematic analysis of redundant robots. In case of redundant robots inverse kinematics is complicated by the nonsquare nature of the Jacobian. In this method the Jacobian and inverse kinematic equation are reduced based on the rank of the Jacobian and the constraints specified. This process automatically locks some joints of the robot at various trajectory points. The reduced inverse kinematic equation is solved by an iterative procedure to find...
Show moreA new approach has been developed for inverse kinematic analysis of redundant robots. In case of redundant robots inverse kinematics is complicated by the nonsquare nature of the Jacobian. In this method the Jacobian and inverse kinematic equation are reduced based on the rank of the Jacobian and the constraints specified. This process automatically locks some joints of the robot at various trajectory points. The reduced inverse kinematic equation is solved by an iterative procedure to find joint variable values for known task description. The results of computer simulation of the inverse kinematics applied on a redundant planar robot and a redundant moving base robot proved the method to be efficient, and the results can be found within a few iterations with excellent accuracy.
Show less  Date Issued
 1988
 PURL
 http://purl.flvc.org/fcla/dt/14433
 Subject Headings
 Parallel processing (Electronic computers), Computer programs, coding theory, Supercomputers
 Format
 Document (PDF)
 Title
 Static and dynamic load balance strategies for a class of applications.
 Creator
 Pan, Jianping., Florida Atlantic University, Wu, Jie, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

Parallel/distributed systems offer a tremendous processing capacity. However, in order to take full advantage of it, good load distributions are needed. We study the task graph partition problem for a given parallel/distributed application which is modeled using data parallelism and is implemented in a transputer system in a mesh construction. Our approach uses domain partition to separate a given domain into a set of subdomains of equal size and each of which has at most four neighbors. We...
Show moreParallel/distributed systems offer a tremendous processing capacity. However, in order to take full advantage of it, good load distributions are needed. We study the task graph partition problem for a given parallel/distributed application which is modeled using data parallelism and is implemented in a transputer system in a mesh construction. Our approach uses domain partition to separate a given domain into a set of subdomains of equal size and each of which has at most four neighbors. We devise three methods to partition a given domain, these methods are compared based on several criteria. The impact of the number of processors used in implementation is also investigated based on several parameters, including processor speed, communication speed, and amount of computation and communication per data point. We discuss implementation of our approach in the application based on the existing features of the transputer system, and compare different versions of application through running a simulation system.
Show less  Date Issued
 1996
 PURL
 http://purl.flvc.org/fcla/dt/15298
 Subject Headings
 Parallel processing (Electronic computers), Electronic data processingDistributed processing, Computer capacityManagement, Transputers
 Format
 Document (PDF)
 Title
 Application level intrusion detection using a sequence learning algorithm.
 Creator
 Dong, Yuhong., Florida Atlantic University, Hsu, Sam, Rajput, Saeed, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

An unsupervised learning algorithm on application level intrusion detection, named Graph Sequence Learning Algorithm (GSLA), is proposed in this dissertation. Experiments prove its effectiveness. Similar to most intrusion detection algorithms, in GSLA, the normal profile needs to be learned first. The normal profile is built using a session learning method, which is combined with the oneway Analysis of Variance method (ANOVA) to determine the value of an anomaly threshold. In the proposed...
Show moreAn unsupervised learning algorithm on application level intrusion detection, named Graph Sequence Learning Algorithm (GSLA), is proposed in this dissertation. Experiments prove its effectiveness. Similar to most intrusion detection algorithms, in GSLA, the normal profile needs to be learned first. The normal profile is built using a session learning method, which is combined with the oneway Analysis of Variance method (ANOVA) to determine the value of an anomaly threshold. In the proposed approach, a hash table is used to store a sparse data matrix in triple data format that is collected from a web transition log instead of an nbyn dimension matrix. Furthermore, in GSLA, the sequence learning matrix can be dynamically changed according to a different volume of data sets. Therefore, this approach is more efficient, easy to manipulate, and saves memory space. To validate the effectiveness of the algorithm, extensive simulations have been conducted by applying the GSLA algorithm to the homework submission system at our computer science and engineering department. The performance of GSLA is evaluated and compared with traditional Markov Model (MM) and Kmeans algorithms. Specifically, three major experiments have been done: (1) A small data set is collected as a sample data, and is applied to GSLA, MM, and Kmeans algorithms to illustrate the operation of the proposed algorithm and demonstrate the detection of abnormal behaviors. (2) The Random WalkThrough sampling method is used to generate a larger sample data set, and the resultant anomaly score is classified into several clusters in order to visualize and demonstrate the normal and abnormal behaviors with Kmeans and GSLA algorithms. (3) Multiple professors' data sets are collected and used to build the normal profiles, and the ANOVA method is used to test the significant difference among professors' normal profiles. The GSLA algorithm can be made as a module and plugged into the IDS as an anomaly detection system.
Show less  Date Issued
 2006
 PURL
 http://purl.flvc.org/fcla/dt/12220
 Subject Headings
 Data mining, Parallel processing (Electronic computers), Computer algorithms, Computer security, Pattern recognition systems
 Format
 Document (PDF)
 Title
 Faulttolerant parallel computing using shuffle exchange hypercube and cubeconnected cubes.
 Creator
 Goyal, Praduemn K., Florida Atlantic University, Wu, Jie, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

The hypercube has become one of the most popular architectures for a wide variety of parallel processing applications and has been used in several commercial and research multiprocessors. Its topological and reliability properties have been studied extensively and several techniques have been proposed for enhancing its reliability. We first present a survey of the techniques that have been used for analyzing and enhancing the reliability of the hypercube and propose a classification framework...
Show moreThe hypercube has become one of the most popular architectures for a wide variety of parallel processing applications and has been used in several commercial and research multiprocessors. Its topological and reliability properties have been studied extensively and several techniques have been proposed for enhancing its reliability. We first present a survey of the techniques that have been used for analyzing and enhancing the reliability of the hypercube and propose a classification framework in which the surveyed reliability analysis techniques can be critically evaluated. Invariably, the techniques for enhancing the fault tolerance of the hypercube require modification of the processing nodes to include redundant elements, or alternatively, degrade the hypercube to a lower dimension cube when faults occur. We propose a technique using unmodified processing elements that takes advantage of the dataflow patterns of a specific class of parallel algorithms belonging to the divideandconquer paradigm. It is shown that by incorporating shuffles and exchanges, the execution of the divideandconquer class of algorithms on the hypercube can be made fault tolerant. We develop this technique into a faulttolerant computing scheme for execution of divideandconquer class of parallel algorithms, which we call Shuffle Exchange Hypercube (SEH). We propose a new recursively defined interconnection architecture for parallel computation called CubeConnected Cubes (CCCubes). It is shown that the CCCubes architecture can emulate both the hypercube and the CubeConnected Cycles (CCC) architectures. The CCCubes architecture is recursively extended into the kth order Generalized CubeConnected Cubes (GCCCubes) architecture. We propose several classes of CCCubes and GCCCubes architectures and study their topological and reliability properties. A comparison of the reliability and topological properties of the proposed architectures with those of the hypercube is provided and it is shown that the CCCubes and GCCCubes architectures present practical alternatives to the hypercube. Finally, some areas worthy of further pursuit are presented, which include the problem of determining a switch route schedule for SEH, extension of shuffles and exchanges to CCCubes and GCCCubes, and the determination of a VLSI layout for the proposed CCCubes and GCCCubes architectures.
Show less  Date Issued
 1998
 PURL
 http://purl.flvc.org/fcla/dt/12581
 Subject Headings
 Faulttolerant computing, Hypercube networks (Computer networks), Parallel processing (Electronic computers)
 Format
 Document (PDF)
 Title
 The influence of connectivity on the global dynamics of nonlinear oscillator ensembles.
 Creator
 Rogers, Jeffrey L., Florida Atlantic University, Wille, Luc T.
 Abstract/Description

In this thesis we have studied the global dynamics which spontaneously emerge in ensembles of interacting disparate nonlinear oscillators. Collective phenomena exhibited in these systems include synchronization, quasiperiodicity, chaos, and death. Exact analytical solutions are presented for two and three coupled oscillators with phase and amplitude variations. A phenomenon analogous to a phasetransition is found as a function of interactionrange in a onedimensional lattice: for coupling...
Show moreIn this thesis we have studied the global dynamics which spontaneously emerge in ensembles of interacting disparate nonlinear oscillators. Collective phenomena exhibited in these systems include synchronization, quasiperiodicity, chaos, and death. Exact analytical solutions are presented for two and three coupled oscillators with phase and amplitude variations. A phenomenon analogous to a phasetransition is found as a function of interactionrange in a onedimensional lattice: for coupling exponents larger than some critical value, alpha c, synchronization is shown to be impossible. Massively parallel computer simulations in conjunction with finitesize scaling were used to extrapolate to the infinitesize limit.
Show less  Date Issued
 1994
 PURL
 http://purl.flvc.org/fcla/dt/15031
 Subject Headings
 Nonlinear oscillators, Coupled mode theory, PhysicsData processing, Parallel processing (Electronic computers)
 Format
 Document (PDF)
 Title
 Parallel architectures and algorithms for digital filter VLSI implementation.
 Creator
 Desai, Pratik Vishnubhai., Florida Atlantic University, Sudhakar, Raghavan
 Abstract/Description

In many scientific and signal processing applications, there are increasing demands for large volume and high speed computations, which call for not only highspeed low power computing hardware, but also for novel approaches in developing new algorithms and architectures. This thesis is concerned with the development of such architectures and algorithms suitable for the VLSI implementation of recursive and nonrecursive 1dimension digital filters using multiple slower processing elements. As...
Show moreIn many scientific and signal processing applications, there are increasing demands for large volume and high speed computations, which call for not only highspeed low power computing hardware, but also for novel approaches in developing new algorithms and architectures. This thesis is concerned with the development of such architectures and algorithms suitable for the VLSI implementation of recursive and nonrecursive 1dimension digital filters using multiple slower processing elements. As the background for the development, vectorization techniques such as statespace modeling, block processing, and look ahead computation are introduced. Concurrent architectures such as systolic arrays, wavefront arrays and appropriate parallel filter realizations such as lattice, allpass, and wave filters are reviewed. A fully hardware efficient systolic array architecture termed as Multiplexed BlockState Filter is proposed for the high speed implementation of lattice and direct realizations of digital filters. The thesis also proposes a new simplified algorithm, Alternate Pole Pairing Algorithm, for realizing an odd order recursive filter as the sum of two allpass filters. Performance of the proposed schemes are verified through numerical examples and simulation results.
Show less  Date Issued
 1995
 PURL
 http://purl.flvc.org/fcla/dt/15155
 Subject Headings
 Integrated circuitsVery large scale integration, Parallel processing (Electronic computers), Computer network architectures, Algorithms (Data processing), Digital integrated circuits
 Format
 Document (PDF)
 Title
 Parallelization of the canal subsystem of the Everglades Landscape Model.
 Creator
 Xu, Yan., Florida Atlantic University, Evett, Matthew P., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

Environmental simulations are computationally very demanding. South Florida Water Management District has implemented the Everglades Landscape Model (ELM) to simulate the ecosystem in South Florida. The current implementation parallelizes all of the model except the canal system. This thesis describes the parallelization of the canal system. We study the canal system and its interaction with the rest of the ELM, and created three distinct parallel implementations. Two of the methods, onedo...
Show moreEnvironmental simulations are computationally very demanding. South Florida Water Management District has implemented the Everglades Landscape Model (ELM) to simulate the ecosystem in South Florida. The current implementation parallelizes all of the model except the canal system. This thesis describes the parallelization of the canal system. We study the canal system and its interaction with the rest of the ELM, and created three distinct parallel implementations. Two of the methods, onedoall and alldoall, provide parallelism via task replication while the third method, taskparallel, decomposes the canal system into tasks and uses a localitybased heuristic algorithm to schedule the tasks. We analyze the performance of three methods and discuss future directions for parallelization of the ELM and other environmental models.
Show less  Date Issued
 1997
 PURL
 http://purl.flvc.org/fcla/dt/15476
 Subject Headings
 Hydrologic models, CanalsFlorida, Parallel processing (Electronic computers)Florida
 Format
 Document (PDF)
 Title
 Parallelcomputing concepts and methods toward largescale floquet analysis of helicopter trim and stability.
 Creator
 Nakadi, Rajesh Mohan., Florida Atlantic University, Gaonkar, Gopal H., College of Engineering and Computer Science, Department of Ocean and Mechanical Engineering
 Abstract/Description

The rotorcraft trim solution involves a search for control inputs for required flight conditions as well as for corresponding initial conditions for periodic response or orbit. The control inputs are specified indirectly to satisfy flight conditions of prescribed thrust levels, rolling and pitching moments etc. In addition to the nonlinearity of the equations of motion and control inputs, the control inputs appear not only in damping and stiffness matrices but also in the forcingfunction or...
Show moreThe rotorcraft trim solution involves a search for control inputs for required flight conditions as well as for corresponding initial conditions for periodic response or orbit. The control inputs are specified indirectly to satisfy flight conditions of prescribed thrust levels, rolling and pitching moments etc. In addition to the nonlinearity of the equations of motion and control inputs, the control inputs appear not only in damping and stiffness matrices but also in the forcingfunction or input matrix; they must be found concomitantly with the periodic response from external constraints on the flight conditions. The Floquet Transition Matrix (FTM) is generated for perturbations about that periodic response; usually, a byproduct of the trim analysis. The damping levels or stability margins are computed from an eigenanalysis of the FTM. The Floquet analysis comprises the trim analysis and eigenanalysis and is routinely used for small order systems (order N < 100). However, it is practical for neither design applications nor comprehensive analysis models that lead to large systems (N > 100); the execution time on a sequential computer is prohibitive. The trim analysis takes the bulk of this execution time. Accordingly, this thesis develops concepts and methods of parallelism toward Floquet analysis of large systems with computational reliability comparable to that of sequential computations. A parallel shooting scheme with damped Newton iteration is developed for the trim analysis. The scheme uses parallel algorithms of RungeKutta integration and linear equations solution. A parallel QR algorithm is used for the eigenanalysis of the FTM. Additional parallelism in each iteration cycle is achieved by concurrent operations such as perturbations of initial conditions and control inputs, followup integrations and formations of the columns of the Jacobian matrix. These parallel shooting and eigenanalysis schemes are applied to the nonlinear flaplag stability with a threedimensional dynamic wake (N ~ 150). The stability also is investigated by widely used sequential schemes of shooting with damped Newton iteration and QR eigenanalysis. The computational reliability is quantified by the maximum condition number of the Jacobian matrices in the Newton iteration, the eigenvalue condition numbers and the residual errors of the eigenpairs. The saving in computer time is quantified by the speedup, which is the ratio of the execution times of Floquet analysis by sequential and parallel schemes. The work is carried out on massively parallel MasPar MP1, a distributedmemory, singleinstruction multipledata or SIMD computer. A major finding is that with increasing system order, while the parallel execution time remains nearly constant, the sequential execution time increases nearly cubically with N. Thus, parallelism promises to make largescale Floquet analysis practical.
Show less  Date Issued
 1994
 PURL
 http://purl.flvc.org/fcla/dt/15085
 Subject Headings
 Floquet theory, HelicoptersControl systems, Rotors (Helicopters), Parallel processing (Electronic computers)
 Format
 Document (PDF)
 Title
 A simplistic approach to reactive multirobot navigation in unknown environments.
 Creator
 MacKunis, William Thomas., Florida Atlantic University, Raviv, Daniel, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

Multiagent control is a very promising area of robotics. In applications for which it is difficult or impossible for humans to intervene, the utilization of multiagent, autonomous robot groups is indispensable. This thesis presents a novel approach to reactive multiagent control that is practical and elegant in its simplicity. The basic idea upon which this approach is based is that a group of robots can cooperate to determine the shortest path through a previously unmapped environment by...
Show moreMultiagent control is a very promising area of robotics. In applications for which it is difficult or impossible for humans to intervene, the utilization of multiagent, autonomous robot groups is indispensable. This thesis presents a novel approach to reactive multiagent control that is practical and elegant in its simplicity. The basic idea upon which this approach is based is that a group of robots can cooperate to determine the shortest path through a previously unmapped environment by virtue of redundant sharing of simple data between multiple agents. The idea was implemented with two robots. In simulation, it was tested with over sixty agents. The results clearly show that the shortest path through various environments emerges as a result of redundant sharing of information between agents. In addition, this approach exhibits safeguarding techniques that reduce the risk to robot agents working in unknown and possibly hazardous environments. Further, the simplicity of this approach makes implementation very practical and easily expandable to reliably control a group comprised of many agents.
Show less  Date Issued
 2003
 PURL
 http://purl.flvc.org/fcla/dt/13013
 Subject Headings
 RobotsControl systems, Intelligent control systems, Genetic algorithms, Parallel processing (Electronic computers)
 Format
 Document (PDF)
 Title
 Analysis of a novel class of faulttolerant multistage interconnection networks.
 Creator
 Huang, ChienJen, Florida Atlantic University, Mahgoub, Imad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

Multistage interconnection networks (MINs) have become an important subset of the interconnection networks which are used to communicate between processors and memory modules for large scale multiprocessor systems. Unfortunately, unique path MINs lack fault tolerance. In this dissertation, a novel scheme for constructing faulttolerant MINs is presented. We first partition the given MINs into even sized partitions and show some faulttolerant properties of the partitioned MINs. Using three...
Show moreMultistage interconnection networks (MINs) have become an important subset of the interconnection networks which are used to communicate between processors and memory modules for large scale multiprocessor systems. Unfortunately, unique path MINs lack fault tolerance. In this dissertation, a novel scheme for constructing faulttolerant MINs is presented. We first partition the given MINs into even sized partitions and show some faulttolerant properties of the partitioned MINs. Using three stages of multiplexers/demultiplexers, an augmenting scheme which takes advantage of locality in program execution is then proposed to further improve the faulttolerant ability and performance of the partitioned MINs. The topological characteristics of augmented partitioned multistage interconnection networks (APMINs) are analyzed. Based on switch fault model, simulations have been carried out to evaluate the full access and dynamic full access capabilities of APMINs. The results show that the proposed scheme significantly improves the faulttolerant capability of MINs. Cost effectiveness of this new scheme in terms of cost, full access, dynamic full access, locality, and average path length has also been evaluated. It has been shown that this new scheme is more cost effective for high switch failure rate and/or large size networks. Analytical modeling techniques have been developed to evaluate the performance of APOmega network and APOmega networkbased multiprocessor systems. The performance of Omega, modified Omega, and APOmega networks in terms of processor utilization and processor waiting time have been compared and the results show that the new scheme indeed, improves the performance both in network level and in system level. Finally, based on the reliability of serial/parallel network components, models for evaluating the terminal reliability and the network reliability of APOmega network using upper and lower bound measures have also been proposed and the results show that applying locality improve APMINs' reliability.
Show less  Date Issued
 1993
 PURL
 http://purl.flvc.org/fcla/dt/12345
 Subject Headings
 Integratged circuitsVery large scale integration, Faulttolerant computing, Computer architecture, Parallel processing (Electronic computers)
 Format
 Document (PDF)
 Title
 Embedding binomial trees in faulty hypercube multiprocessors.
 Creator
 Luo, Yinqiu., Florida Atlantic University, Wu, Jie, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
 Abstract/Description

We study the embedding of binomial trees with variable roots in faulty hypercubes. Based on novel embedding strategies, we propose three embedding algorithms with variable nodes as the root. The first algorithm can tolerate up to n  1 faulty links, but the execution can be done within log2(n  1) subcube splits. The second one can tolerate up to [(3(n  1))\2] faulty links. The last one can tolerate up to [(3(n  4))\2] faulty nodes.
 Date Issued
 1996
 PURL
 http://purl.flvc.org/fcla/dt/15345
 Subject Headings
 Hypercube networks (Computer networks), Trees (Graph theory), Multiprocessors, Parallel processing (Electronic computers), Computer algorithms, Faulttolerant computing, Embedded computer systems
 Format
 Document (PDF)