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Remote Labs: A Method to Implement a Portable Logic Design Laboratory Infrastructure and to Provide Access to Modern Test Equipment
Title
Remote Labs: A Method to Implement a Portable Logic Design Laboratory Infrastructure and to Provide Access to Modern Test Equipment.
Creator
Weinthal, Charles Perry, Petrie, Maria Mercedes Larrondo, Florida Atlantic University, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
This Thesis explores building low cost and reliable portable laboratory infrastructure platform for Logic Design, methods for allowing access to modern test equipment via the internet, and issues related to academic integrity. A comprehensive engineering education, per ABET, requires an equal emphasis on both lecture and laboratory components. The laboratory experience builds and establishes a foundation of skills and experiences that the student cannot obtain through any other means. The...
Show moreThis Thesis explores building low cost and reliable portable laboratory infrastructure platform for Logic Design, methods for allowing access to modern test equipment via the internet, and issues related to academic integrity. A comprehensive engineering education, per ABET, requires an equal emphasis on both lecture and laboratory components. The laboratory experience builds and establishes a foundation of skills and experiences that the student cannot obtain through any other means. The laboratory must use modern, pertinent methods and techniques including the use of appropriate tools. This is especially true when it comes to test equipment. Engineering students require and deserve training on and access to modern test equipment in order to obtain better career opportunities. However, providing access to modern and relevant labs requires a significant budget commitment. One way to extend current budgets is to adopt the growing concept of “remote labs.” This approach allows higher utilization of existing (and costly) equipment, it improves an institution’s Return on Investment (ROI), and also can be used to meet the needs of students’ complicated schedules, especially in the case of a “commuter campus,” where a majority of students live off campus. By developing remote labs, both the institution and the students benefit: Institutions increase equipment utilization, and utilize space, budgets and support personnel more efficiently. Students can access a lab whenever and wherever they have internet access. Finally, academic integrity must be protected to ensure the potential of remote laboratories in education. This Thesis presents a design and implementation plan for a low cost Logic Design laboratory infrastructure built and tested over 3 years by over 1,500 Logic Design students; a design and implementation of the infrastructure to include the ability to measure using remote test equipment; and the design of a case (3d printed or laser cut) to encapsulate a USB enabled micro-controller; and a scheme to ensure the academic integrity is maintained for in-person, hybrid and fully online classes.
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Date Issued
2018
PURL
http://purl.flvc.org/fau/fd/FA00013177
Subject Headings
Logic design, Engineering laboratories, Logic design--Computer-assisted instruction
Format
Document (PDF)
Low-power design of an ALU
Title
Low-power design of an ALU.
Creator
Agarwal, Ankur, Florida Atlantic University, Pandya, Abhijit S.
Abstract/Description
There is a mushrooming demand for battery operated applications that require intensive computation in portable environments. This has motivated the research and development of techniques that reduce power in CMOS digital circuits while maintaining their computational throughput. The two essentials to achieve a low power design are miniaturization and long battery life. Lowering the supply voltage is one of the most effective ways to achieve low-power performance as power dissipation in...
Show moreThere is a mushrooming demand for battery operated applications that require intensive computation in portable environments. This has motivated the research and development of techniques that reduce power in CMOS digital circuits while maintaining their computational throughput. The two essentials to achieve a low power design are miniaturization and long battery life. Lowering the supply voltage is one of the most effective ways to achieve low-power performance as power dissipation in digital CMOS circuits is approximately proportional to the square of supply voltage. The basic idea behind this thesis is that it proposes new designs of transfer gate based logical circuits, which use lower supply voltage and less number of transistors than the conventional designs. This work evaluates the obtained results from the proposed designs of the low-power ALU with that from the standard CMOS, other low power designs namely, Wang's XOR, XNOR and Inverter based gates. It was observed that the proposed designs perform better in terms of power consumption than the standard CMOS designs, and the other low power designs mentioned above.
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Date Issued
2003
PURL
http://purl.flvc.org/fcla/dt/13017
Subject Headings
Metal oxide semiconductors, Complementary, Low voltage integrated circuits, Verilog (Computer hardware description language), Logic design
Format
Document (PDF)
DCVS logic synthesis
Title
DCVS logic synthesis.
Creator
Xiao, Kang., Florida Atlantic University, Barrett, Raymond L. Jr., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
Implementation of CMOS combinational logic with Differential Cascode Voltage Switch logic (DCVS) may have many advantages over the traditional CMOS logic approaches with respect to device count, layout density and timing. DCVS is an ideal target technology for a logic synthesis system in that it provides a complete function cover by providing the function and its complement simultaneously. DCVS is also more testable due to this. We have developed for IBM's DCVS technology a synthesis...
Show moreImplementation of CMOS combinational logic with Differential Cascode Voltage Switch logic (DCVS) may have many advantages over the traditional CMOS logic approaches with respect to device count, layout density and timing. DCVS is an ideal target technology for a logic synthesis system in that it provides a complete function cover by providing the function and its complement simultaneously. DCVS is also more testable due to this. We have developed for IBM's DCVS technology a synthesis algorithm and a new test generation approach, that are based on topologies rather than individual logic functions. We have found that 19 and 363 DCVS topologies can represent 256 and 65,536 functions, respectively, for the 3- and 4-varaible cases. Physical defect analysis was conducted with the aid of a building block approach to analyze the n-type logic tree and provides a basis for evolving hierarchical test pattern generation for the topologies.
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Date Issued
1992
PURL
http://purl.flvc.org/fcla/dt/14850
Subject Headings
Integrated circuits--Very large scale integration--Data processing, Metal oxide semiconductors, Complementary, Computer-aided design, Electronic systems, Logic design--Data processing
Format
Document (PDF)
Smart low power obstacle avoidance device
Title
Smart low power obstacle avoidance device.
Creator
Cividanes, Ernesto., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
Abstract/Description
Several technologies are being made available for the blind and the visually impaired with the use of infrared and sonar sensors, Radio Frequency Identification, GPS, Wi-Fi among others. Current technologies utilizing microprocessors increase the device's power consumption. In this project, a Verilog Hardware Language (VHDL) designed handheld device that autonomously guides a visually impaired user through an obstacle free path is proposed. The goal is to minimize power consumption by not...
Show moreSeveral technologies are being made available for the blind and the visually impaired with the use of infrared and sonar sensors, Radio Frequency Identification, GPS, Wi-Fi among others. Current technologies utilizing microprocessors increase the device's power consumption. In this project, a Verilog Hardware Language (VHDL) designed handheld device that autonomously guides a visually impaired user through an obstacle free path is proposed. The goal is to minimize power consumption by not using the usual microcontroller and replacing it with components that can increase its speed. Utilizing six infrared sensors, the handheld device is modeled after current technologies which use IR and sonar sensors which are reviewed in this project. By using behavioral modeling, an algorithm for obstacle avoidance and the generation of the obstacle free path is reduced using a K-map and implemented using a multiplexer.
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Date Issued
2010
PURL
http://purl.flvc.org/FAU/2954841
Subject Headings
Verilog (Computer hardware description language), VHDL (Computer hardware description language), Rapid prototyping, Logic design, Intelligent control systems, Brain-computer interfaces
Format
Document (PDF)