Current Search: Formal methods Computer science (x)
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Title
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Industrial-strength formalization of object-oriented real-time systems.
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Creator
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Raghavan, Gopalakrishna., Florida Atlantic University, Larrondo-Petrie, Maria M., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
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Abstract/Description
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The goal of this dissertation is to propose an industrial-strength formal model for object-oriented real-time systems that captures real-time constraints using industry standard notations and tools. A light-weight formalization process is proposed that is semi-formal, graphical and easier to read and understand. This process supports formal behavior analysis, verification and validation. It is very effective in early detection of incompleteness and ambiguities in the specifications. The...
Show moreThe goal of this dissertation is to propose an industrial-strength formal model for object-oriented real-time systems that captures real-time constraints using industry standard notations and tools. A light-weight formalization process is proposed that is semi-formal, graphical and easier to read and understand. This process supports formal behavior analysis, verification and validation. It is very effective in early detection of incompleteness and ambiguities in the specifications. The proposed process uses industry standard tools and fits well within stringent industrial schedules. Formal requirements analysis is conducted using High Level Message Sequencing Chart (HMSC) and Message Sequencing Chart (MSC). In the formal analysis phase, the static structures are modeled using Unified Modeling Language (UML) and the constraints are formalized using Object Constraint Language (OCL). System behavior is formally modeled using Specification and Description Language (SDL) during the formal design phase. SDL is used for behavior modeling due to wide commercial availability of SDL-based tools for formal behavior analysis and validation. Transition rules mapping from UML Class Diagrams and Statecharts to SDL models are proposed. SDL models are formally simulated and validated during the formal validation phase. Using the proposed process real-time clock, timer, periodic process, aperiodic process, resource and precedence constraints were formalized. Different types of timers, such as periodic, aperiodic, one-shot, fixed-interval and variable-interval timers are derived using inheritance models. Semaphore wait and signal operations are formalized as part of the resource constraint. Pre-conditions, post-conditions and invariants for the real-time constraints were captured using OCL. Behavior of the proposed models were captured using Statecharts. The proposed mapping rules were used to translate the behavior models to SDL. The SDL models were formally simulated and validated using Telelogic Software Development Tool (SDT). The tools allowed extensive model analysis and helped uncover several design flaws. The real-time constraints were stereotyped and packaged into reusable formal components. These components can be easily imported by applications. Two case studies, Cruise Control System and Bottle Filling System, are included to illustrate the use of the proposed process and the real-time package. The "industrial-strength" of the process was validated by utilizing the proposed process in an industrial project where it was found to accelerate the development process.
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Date Issued
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2000
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PURL
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http://purl.flvc.org/fcla/dt/12632
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Subject Headings
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Object-oriented programming (Computer science), Real-time data processing, Formal methods (Computer science)
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Format
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Document (PDF)
