Current Search: Computer network architectures (x)
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- Title
- A next generation computer network communications architecture.
- Creator
- Thor, Bernice Lynn., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
A Next Generation Computer Network Communications Architecture, CNCA, is developed in this thesis. Existing communication techniques and available networking technologies are explored. This provides the background information for the development of the architecture. Hardware, protocol, and interface requirements are addressed to provide a practical architecture for supporting high speed communications beyond current implementations. A reduction process is then performed to extract the optimal...
Show moreA Next Generation Computer Network Communications Architecture, CNCA, is developed in this thesis. Existing communication techniques and available networking technologies are explored. This provides the background information for the development of the architecture. Hardware, protocol, and interface requirements are addressed to provide a practical architecture for supporting high speed communications beyond current implementations. A reduction process is then performed to extract the optimal components for the CNCA platform. The resulting architecture describes a next generation communications device that is capable of very fast switching and fast processing of information. The architecture interfaces with existing products, and provides extensive flexibility. This protects existing equipment investments, and supports future enhancements.
Show less - Date Issued
- 1991
- PURL
- http://purl.flvc.org/fcla/dt/14726
- Subject Headings
- Computer network architectures, Computer networks
- Format
- Document (PDF)
- Title
- Memory latency evaluation in cluster-based cache-coherent multiprocessor systems with different interconnection topologies.
- Creator
- Asaduzzaman, Abu Sadath Mohammad, Florida Atlantic University, Mahgoub, Imad
- Abstract/Description
-
This research investigates memory latency of cluster-based cache-coherent multiprocessor systems with different interconnection topologies. We focus on a cluster-based architecture which is a variation of Stanford DASH architecture. The architecture, also, has some similarities with the STiNG architecture from Sequent Computer System Inc. In this architecture, a small number of processors and a portion of shared-memory are connected through a bus inside each cluster. As the number of...
Show moreThis research investigates memory latency of cluster-based cache-coherent multiprocessor systems with different interconnection topologies. We focus on a cluster-based architecture which is a variation of Stanford DASH architecture. The architecture, also, has some similarities with the STiNG architecture from Sequent Computer System Inc. In this architecture, a small number of processors and a portion of shared-memory are connected through a bus inside each cluster. As the number of processors per cluster is small, snoopy protocol is used inside each cluster. Each processor has two levels of caches and for each cluster a separate directory is maintained. Clusters are connected using directory-based scheme through an interconnection network to make the system scaleable. Trace-driven simulation has been developed to evaluate the overall memory latency of this architecture using three different network topologies, namely ring, mesh, and hypercube. For each network topology, the overall memory latency has been evaluated running a representative set of SPLASH-2 applications. Simulation results show that, the cluster-based multiprocessor system with hypercube topology outperforms those with mesh and ring topologies.
Show less - Date Issued
- 1997
- PURL
- http://purl.flvc.org/fcla/dt/15447
- Subject Headings
- Computer network architectures, Multiprocessors
- Format
- Document (PDF)
- Title
- Dual Bus R-Net: A new local/metropolitan area network.
- Creator
- Chauhan, Sanjeev Birbal., Florida Atlantic University, Ilyas, Mohammad
- Abstract/Description
-
In this thesis we have proposed and analyzed a new architecture for high speed fiber optic LANs/MANs, called the Dual Bus R-Net. The scheme is based on a slotted unidirectional dual bus structure. It uses a reservation mechanism to generate slotted frames on each bus. Frames consist of a reservation slot and one or many information slots. Stations reserve slots by transmitting reservation requests on the bus carrying information in the opposite direction. The scheme has the advantage of...
Show moreIn this thesis we have proposed and analyzed a new architecture for high speed fiber optic LANs/MANs, called the Dual Bus R-Net. The scheme is based on a slotted unidirectional dual bus structure. It uses a reservation mechanism to generate slotted frames on each bus. Frames consist of a reservation slot and one or many information slots. Stations reserve slots by transmitting reservation requests on the bus carrying information in the opposite direction. The scheme has the advantage of superior channel utilization, bounded delay, fair access to all stations, dynamic bandwidth allocation to network users, and implementation simplicity. Extensive simulations have been carried out to verify the characteristics of the network. Simulation results reinforce the initial claims of the advantages offered by Dual Bus R-Net. Performance analysis is presented in terms of network delay and channel utilization. Simulation results are compared with similar results of X-Net, R-Net, DQDB, and Expressnet.
Show less - Date Issued
- 1994
- PURL
- http://purl.flvc.org/fcla/dt/15006
- Subject Headings
- Local area networks (Computer networks), Metropolitan area networks (Computer networks), Computer network architectures, Computer network protocols
- Format
- Document (PDF)
- Title
- A REFERENCE ARCHITECTURE FOR NETWORK FUNCTION VIRTUALIZATION.
- Creator
- Alwakeel, Ahmed M., Fernandez, Eduardo B., Florida Atlantic University, Department of Computer and Electrical Engineering and Computer Science, College of Engineering and Computer Science
- Abstract/Description
-
Cloud computing has provided many services to potential consumers, one of these services being the provision of network functions using virtualization. Network Function Virtualization is a new technology that aims to improve the way we consume network services. Legacy networking solutions are different because consumers must buy and install various hardware equipment. In NFV, networks are provided to users as a software as a service (SaaS). Implementing NFV comes with many benefits, including...
Show moreCloud computing has provided many services to potential consumers, one of these services being the provision of network functions using virtualization. Network Function Virtualization is a new technology that aims to improve the way we consume network services. Legacy networking solutions are different because consumers must buy and install various hardware equipment. In NFV, networks are provided to users as a software as a service (SaaS). Implementing NFV comes with many benefits, including faster module development for network functions, more rapid deployment, enhancement of the network on cloud infrastructures, and lowering the overall cost of having a network system. All these benefits can be achieved in NFV by turning physical network functions into Virtual Network Functions (VNFs). However, since this technology is still a new network paradigm, integrating this virtual environment into a legacy environment or even moving all together into NFV reflects on the complexity of adopting the NFV system. Also, a network service could be composed of several components that are provided by different service providers; this also increases the complexity and heterogeneity of the system. We apply abstract architectural modeling to describe and analyze the NFV architecture. We use architectural patterns to build a flexible NFV architecture to build a Reference Architecture (RA) for NFV that describe the system and how it works. RAs are proven to be a powerful solution to abstract complex systems that lacks semantics. Having an RA for NFV helps us understand the system and how it functions. It also helps us to expose the possible vulnerabilities that may lead to threats toward the system. In the future, this RA could be enhanced into SRA by adding misuse and security patterns for it to cover potential threats and vulnerabilities in the system. Our audiences are system designers, system architects, and security professionals who are interested in building a secure NFV system.
Show less - Date Issued
- 2020
- PURL
- http://purl.flvc.org/fau/fd/FA00013434
- Subject Headings
- Virtual computer systems, Cloud computing, Computer network architectures, Computer networks
- Format
- Document (PDF)
- Title
- Counter-rotating slotted ring: A new metropolitan area network architecture.
- Creator
- Choi, Kwok K., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
In this dissertation a new architecture, Counter Rotating Slotted Ring (CRSR), is proposed for Metropolitan Area Networks (MANs). MANs are newly developed optical fiber based networks that have high data transmission rates and wide area coverage. They provide voice, video and data services. A CRSR has a dual-ring architecture that consists of two uni-directional transmission media, which are shared among the network nodes. The transmission time in a CRSR is divided into fixed length slots....
Show moreIn this dissertation a new architecture, Counter Rotating Slotted Ring (CRSR), is proposed for Metropolitan Area Networks (MANs). MANs are newly developed optical fiber based networks that have high data transmission rates and wide area coverage. They provide voice, video and data services. A CRSR has a dual-ring architecture that consists of two uni-directional transmission media, which are shared among the network nodes. The transmission time in a CRSR is divided into fixed length slots. These slots are generated by a head station during the system initialization phase. They flow inside the dual-ring in opposite directions: clockwise and counter clockwise. In each slot, there is an Access Control Field, a Segment Header Field and a Segment Payload Field. These fields contain slot control bits, segment identification and data respectively. One of the control bits is used to indicate if a slot has data or not. Once a busy slot, i.e. a slot with data, reaches its destination, it is marked as 'read'. An eraser node is used to identify 'read' slots and erase the data in the slots. In CRSR, there are two possible routes to send data from one node to another. The route with fewer nodes in between is always selected. This Minimum Node Count Routing reduces traffic on the transmission medium. IEEE has issued a Distributed Queue Dual Bus (DQDB) 802.6 standard for the subnetwork of a MAN. Under most circumstances, DQDB performs better than Fiber Distributed Data Interface (FDDI), an ANSI MAN standard. However, DQDB has two drawbacks: positional unfairness and poor channel efficiency. A number of solutions have been proposed to solve the unfairness problem, but these approaches do not improve the situation without negative effects on network performance. A CRSR with eraser in all its nodes has two times as much maximum throughput as an equivalent DQDB and at the same time, it is a positionally fair network. Although CRSRs with fewer eraser nodes are unfair, they always outperform equivalent DQDBs both in throughput and fairness.
Show less - Date Issued
- 1993
- PURL
- http://purl.flvc.org/fcla/dt/12340
- Subject Headings
- Metropolitan area networks (Computer networks), Computer network architectures
- Format
- Document (PDF)
- Title
- Fault-tolerant multicasting in hypercube multicomputers.
- Creator
- Yao, Kejun., Florida Atlantic University, Wu, Jie, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
Interprocessor communication plays an important role in the performance of multicomputer systems, such as hypercube multicomputers. In this thesis, we consider the multicast problem for a hypercube system in the presence of faulty components. Two types of algorithms are proposed. Type 1 algorithms, which are developed based on local network information, can tolerate both node failures and link failures. Type 2 algorithms, which are developed based on limited global network information, ensure...
Show moreInterprocessor communication plays an important role in the performance of multicomputer systems, such as hypercube multicomputers. In this thesis, we consider the multicast problem for a hypercube system in the presence of faulty components. Two types of algorithms are proposed. Type 1 algorithms, which are developed based on local network information, can tolerate both node failures and link failures. Type 2 algorithms, which are developed based on limited global network information, ensure that each destination receives message through the shortest path. Simulation results show that type 2 algorithms achieve very good results on both time and traffic steps, two main criteria in measuring the performance of interprocessor communication.
Show less - Date Issued
- 1993
- PURL
- http://purl.flvc.org/fcla/dt/14896
- Subject Headings
- Hypercube networks (Computer networks), Computer architecture, Fault-tolerant computing
- Format
- Document (PDF)
- Title
- Unifying the conceptual levels of network security through the use of patterns.
- Creator
- Kumar, Ajoy, Fernandez, Eduardo B., Florida Atlantic University, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
Network architectures are described by the International Standard for Organization (ISO), which contains seven layers. The internet uses four of these layers, of which three are of interest to us. These layers are Internet Protocol (IP) or Network Layer, Transport Layer and Application Layer. We need to protect against attacks that may come through any of these layers. In the world of network security, systems are plagued by various attacks, internal and external, and could result in Denial...
Show moreNetwork architectures are described by the International Standard for Organization (ISO), which contains seven layers. The internet uses four of these layers, of which three are of interest to us. These layers are Internet Protocol (IP) or Network Layer, Transport Layer and Application Layer. We need to protect against attacks that may come through any of these layers. In the world of network security, systems are plagued by various attacks, internal and external, and could result in Denial of Service (DoS) and/or other damaging effects. Such attacks and loss of service can be devastating for the users of the system. The implementation of security devices such as Firewalls and Intrusion Detection Systems (IDS), the protection of network traffic with Virtual Private Networks (VPNs), and the use of secure protocols for the layers are important to enhance the security at each of these layers.We have done a survey of the existing network security patterns and we have written the missing patterns. We have developed security patterns for abstract IDS, Behavior–based IDS and Rule-based IDS and as well as for Internet Protocol Security (IPSec) and Transport Layer Security (TLS) protocols. We have also identified the need for a VPN pattern and have developed security patterns for abstract VPN, an IPSec VPN and a TLS VPN. We also evaluated these patterns with respect to some aspects to simplify their application by system designers. We have tried to unify the security of the network layers using security patterns by tying in security patterns for network transmission, network protocols and network boundary devices.
Show less - Date Issued
- 2014
- PURL
- http://purl.flvc.org/fau/fd/FA00004132, http://purl.flvc.org/fau/fd/FA00004132
- Subject Headings
- Computer architecture, Computer network architectures, Computer network protocols, Computer network protocols, Computer networks -- Security measures, Expert systems (Computer science)
- Format
- Document (PDF)
- Title
- Home automation and power conservation using ZigBeeª.
- Creator
- DiBenedetto, Michael G., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
The ZigBee standard is a wireless networking standard created and maintained by the ZigBee Alliance. The standard aims to provide an inexpensive, reliable, and efficient solution for wirelessly networked sensing and control products. The ZigBee Alliance is composed of over 300 member companies making use of the standard in different ways, ranging from energy management and efficiency, to RF remote controls, to health care products. Home automation is one market that greatly benefits from the...
Show moreThe ZigBee standard is a wireless networking standard created and maintained by the ZigBee Alliance. The standard aims to provide an inexpensive, reliable, and efficient solution for wirelessly networked sensing and control products. The ZigBee Alliance is composed of over 300 member companies making use of the standard in different ways, ranging from energy management and efficiency, to RF remote controls, to health care products. Home automation is one market that greatly benefits from the use of ZigBee. With a focus on conserving home electricity use, a sample design is created to test a home automation network using Freescale's ZigBee platform. Multiple electrical designs are tested utilizing sensors ranging from proximity sensors to current sense transformers. Software is fashioned as well, creating a PC application that interacts with two ZigBee transceiver boards performing different home automation functions such as air conditioner and automatic lighting control.
Show less - Date Issued
- 2009
- PURL
- http://purl.flvc.org/FAU/368609
- Subject Headings
- Sensor networks, Wireless LANs, Computer network architecture, Assistive computer technology
- Format
- Document (PDF)
- Title
- Distributed management of heterogeneous networks using hypermedia data repositories.
- Creator
- Anderson, James M., Florida Atlantic University, Ilyas, Mohammad, Hsu, Sam, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
Current management architectures address portions of the problem of managing high speed distributed networks; however, they do not provide a scalable end-to-end solution that can be applied to both large LAN and WAN high speed distributed networks. A new management architecture, "Web Integrated Network for Distributed Management Including Logic" (WINDMIL), is proposed to address the challenges of managing complex heterogeneous networks. The three primary components of the system are the...
Show moreCurrent management architectures address portions of the problem of managing high speed distributed networks; however, they do not provide a scalable end-to-end solution that can be applied to both large LAN and WAN high speed distributed networks. A new management architecture, "Web Integrated Network for Distributed Management Including Logic" (WINDMIL), is proposed to address the challenges of managing complex heterogeneous networks. The three primary components of the system are the Network Management Server (NMS), the Network Element Web Server (NEWS), and the Operator's Logic and Processing Platform (OLAPP). The NMS stores the management functions used by both the NEWS and the user. The NEWS is a Web server which collects and processes network element data in order to support management functions. The OLAPP executes the management functions and interfaces with the user.
Show less - Date Issued
- 1997
- PURL
- http://purl.flvc.org/fcla/dt/12502
- Subject Headings
- Computer network architectures, Internetworking (Telecommunication), Computer network protocols
- Format
- Document (PDF)
- Title
- Design and performance analysis of FDDI and DQDB network architectures.
- Creator
- Khera, Harbinder Singh., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
The primary emphasis of this thesis is to study the behavioral characteristics of Fiber Distributed Data Interface (FDDI) and Distributed Queue Dual Bus (DQDB) High Speed Local Area Networks (HSLANs). An FDDI architecture with passive interfaces is proposed to provide a reliable and efficient network topology. This network architecture outperforms the existing FDDI architecture with active interfaces in terms of small asynchronous packet delays and high asynchronous packet throughput. The...
Show moreThe primary emphasis of this thesis is to study the behavioral characteristics of Fiber Distributed Data Interface (FDDI) and Distributed Queue Dual Bus (DQDB) High Speed Local Area Networks (HSLANs). An FDDI architecture with passive interfaces is proposed to provide a reliable and efficient network topology. This network architecture outperforms the existing FDDI architecture with active interfaces in terms of small asynchronous packet delays and high asynchronous packet throughput. The design and implementation issues involved in the design of the hierarchical (multi-level) DQDB and FDDI networks are also presented. The hierarchical network architecture provides modularity and scalability with respect to speed and the number of users. Simulation models are developed for each of these network architectures to study their performance. Simulation results are presented in terms of medium access delay, throughput, and packet delays.
Show less - Date Issued
- 1993
- PURL
- http://purl.flvc.org/fcla/dt/14976
- Subject Headings
- Fiber Distributed Data Interface (Computer network standard), Computer architecture, Local area networks (Computer networks)
- Format
- Document (PDF)
- Title
- Reputation-based system for encouraging cooperation of nodes in mobile ad hoc networks.
- Creator
- Anantvalee, Tiranuch., Florida Atlantic University, Wu, Jie
- Abstract/Description
-
In a mobile ad hoc network, node cooperation in packet forwarding is required for the network to function properly. However, since nodes in this network usually have limited resources, some selfish nodes might intend not to forward packets to save resources for their own use. To discourage such behavior, we propose RMS, a reputation-based system, to detect selfish nodes and respond to them by showing that being cooperative will benefit there more than being selfish. We also detect, to some...
Show moreIn a mobile ad hoc network, node cooperation in packet forwarding is required for the network to function properly. However, since nodes in this network usually have limited resources, some selfish nodes might intend not to forward packets to save resources for their own use. To discourage such behavior, we propose RMS, a reputation-based system, to detect selfish nodes and respond to them by showing that being cooperative will benefit there more than being selfish. We also detect, to some degree, nodes who forward only the necessary amount of packets to avoid being detected as selfish. We introduce the use of a state model to decide what we should do or respond to nodes in each state. In addition, we introduce the use of a timing period to control when the reputation should be updated and to use as a timeout for each state. The simulation results show that RMS can identify selfish nodes and punish them accordingly, which provide selfish nodes with an incentive to behave more cooperatively.
Show less - Date Issued
- 2006
- PURL
- http://purl.flvc.org/fcla/dt/13406
- Subject Headings
- Computer networks--Security measures, Wireless communication systems, Routers (Computer networks), Computer network architectures
- Format
- Document (PDF)
- Title
- TOWARDS A SECURITY REFERENCE ARCHITECTURE FOR NETWORK FUNCTION VIRTUALIZATION.
- Creator
- Alnaim, Abdulrahman K., Fernandez, Eduardo B., Florida Atlantic University, Department of Computer and Electrical Engineering and Computer Science, College of Engineering and Computer Science
- Abstract/Description
-
Network Function Virtualization (NFV) is an emerging technology that transforms legacy hardware-based network infrastructure into software-based virtualized networks. Instead of using dedicated hardware and network equipment, NFV relies on cloud and virtualization technologies to deliver network services to its users. These virtualized network services are considered better solutions than hardware-based network functions because their resources can be dynamically increased upon the consumer’s...
Show moreNetwork Function Virtualization (NFV) is an emerging technology that transforms legacy hardware-based network infrastructure into software-based virtualized networks. Instead of using dedicated hardware and network equipment, NFV relies on cloud and virtualization technologies to deliver network services to its users. These virtualized network services are considered better solutions than hardware-based network functions because their resources can be dynamically increased upon the consumer’s request. While their usefulness can’t be denied, they also have some security implications. In complex systems like NFV, the threats can come from a variety of domains due to it containing both the hardware and the virtualize entities in its infrastructure. Also, since it relies on software, the network service in NFV can be manipulated by external entities like third-party providers or consumers. This leads the NFV to have a larger attack surface than the traditional network infrastructure. In addition to its own threats, NFV also inherits security threats from its underlying cloud infrastructure. Therefore, to design a secure NFV system and utilize its full potential, we must have a good understanding of its underlying architecture and its possible security threats. Up until now, only imprecise models of this architecture existed. We try to improve this situation by using architectural modeling to describe and analyze the threats to NFV. Architectural modeling using Patterns and Reference Architectures (RAs) applies abstraction, which helps to reduce the complexity of NFV systems by defining their components at their highest level. The literature lacks attempts to implement this approach to analyze NFV threats. We started by enumerating the possible threats that may jeopardize the NFV system. Then, we performed an analysis of the threats to identify the possible misuses that could be performed from them. These threats are realized in the form of misuse patterns that show how an attack is performed from the point of view of attackers. Some of the most important threats are privilege escalation, virtual machine escape, and distributed denial-of-service. We used a reference architecture of NFV to determine where to add security mechanisms in order to mitigate the identified threats. This produces our ultimate goal, which is building a security reference architecture for NFV.
Show less - Date Issued
- 2020
- PURL
- http://purl.flvc.org/fau/fd/FA00013435
- Subject Headings
- Computer network architectures--Safety measures, Virtual computer systems, Computer networks, Modeling, Computer
- Format
- Document (PDF)
- Title
- Misuse Patterns for the SSL/TLS Protocol.
- Creator
- Alkazimi, Ali, Fernandez, Eduardo B., Florida Atlantic University, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
The SSL/TLS is the main protocol used to provide secure data connection between a client and a server. The main concern of using this protocol is to avoid the secure connection from being breached. Computer systems and their applications are becoming more complex and keeping these secure connections between all the connected components is a challenge. To avoid any new security flaws and protocol connections weaknesses, the SSL/TLS protocol is always releasing newer versions after discovering...
Show moreThe SSL/TLS is the main protocol used to provide secure data connection between a client and a server. The main concern of using this protocol is to avoid the secure connection from being breached. Computer systems and their applications are becoming more complex and keeping these secure connections between all the connected components is a challenge. To avoid any new security flaws and protocol connections weaknesses, the SSL/TLS protocol is always releasing newer versions after discovering security bugs and vulnerabilities in any of its previous version. We have described some of the common security flaws in the SSL/TLS protocol by identifying them in the literature and then by analyzing the activities from each of their use cases to find any possible threats. These threats are realized in the form of misuse cases to understand how an attack happens from the point of the attacker. This approach implies the development of some security patterns which will be added as a reference for designing secure systems using the SSL/TLS protocol. We finally evaluate its security level by using misuse patterns and considering the threat coverage of the models.
Show less - Date Issued
- 2017
- PURL
- http://purl.flvc.org/fau/fd/FA00004873, http://purl.flvc.org/fau/fd/FA00004873
- Subject Headings
- Computer networks--Security measures., Computer network protocols., Computer software--Development., Computer architecture.
- Format
- Document (PDF)
- Title
- Analysis of a cluster-based architecture for hypercube multicomputers.
- Creator
- Obeng, Morrison Stephen., Florida Atlantic University, Mahgoub, Imad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
In this dissertation, we propose and analyze a cluster-based hypercube architecture in which each node of the hypercube is furnished with a cluster of n processors connected through a small crossbar switch with n memory modules. Topological analysis of the cluster-based hypercube architecture shows that it reduces the complexity of the basic hypercube architecture by reducing the diameter, the degree of a node and the number of links in the hypercube. The proposed architecture uses the higher...
Show moreIn this dissertation, we propose and analyze a cluster-based hypercube architecture in which each node of the hypercube is furnished with a cluster of n processors connected through a small crossbar switch with n memory modules. Topological analysis of the cluster-based hypercube architecture shows that it reduces the complexity of the basic hypercube architecture by reducing the diameter, the degree of a node and the number of links in the hypercube. The proposed architecture uses the higher processing power furnished by the cluster of execution processors in each node to address the needs of computation-intensive parallel application programs. It provides a smaller dimension hypercube with the same number of execution processors as a higher dimension conventional hypercube architecture. This scheme can be extended to meshes and other architectures. Mathematical analysis of the parallel simplex and parallel Gaussian elimination algorithms executing on the cluster-based hypercube show the order of complexity of executing an n x n matrix problem on the cluster-based hypercube using parallel simplex algorithm to be O(n^2) and that of the parallel Gaussian elimination algorithm to be O(n^3). The timing analysis derived from the mathematical analysis results indicate that for the same number of processors in the cluster-based hypercube system as the conventional hypercube system, the computation to communication ratio of the cluster-based hypercube executing a matrix problem by parallel simplex algorithm increases when the number of nodes of the cluster-based hypercube is decreased. Self-driven simulations were developed to run parallel simplex and parallel Gaussian elimination algorithms on the proposed cluster-based hypercube architecture and on the Intel Personal Supercomputer (iPSC/860), which is a conventional hypercube. The simulation results show a response time performance improvement of up to 30% in favor of the cluster-based hypercube. We also observe that for increased link delays, the performance gap increases significantly in favor of the cluster-based hypercube architecture when both the cluster-based hypercube and the Intel iPSC/860, a conventional hypercube, execute the same parallel simplex and Gaussian elimination algorithms.
Show less - Date Issued
- 1995
- PURL
- http://purl.flvc.org/fcla/dt/12435
- Subject Headings
- Computer architecture, Cluster analysis--Computer programs, Hypercube networks (Computer networks), Parallel computers
- Format
- Document (PDF)
- Title
- A high-speed switching node architecture for ATM networks.
- Creator
- Syed, Majid Ali, Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
This research is aimed towards the concept of a new switching node architecture for cell-switched Asynchronous Transfer Mode (ATM) networks. The proposed architecture has several distinguishing features when compared with existing Banyan based switching node. It has a cylindrical structure as opposed to a flat structure as found in Banyans. The wrap around property results in better link utilization as compared with existing Banyans beside resulting in reduced average route length. Simplified...
Show moreThis research is aimed towards the concept of a new switching node architecture for cell-switched Asynchronous Transfer Mode (ATM) networks. The proposed architecture has several distinguishing features when compared with existing Banyan based switching node. It has a cylindrical structure as opposed to a flat structure as found in Banyans. The wrap around property results in better link utilization as compared with existing Banyans beside resulting in reduced average route length. Simplified digit controlled routing is maintained as found in Banyans. The cylindrical nature of the architecture, results in pipeline activity. Such architecture tends to sort the traffic to a higher address, eliminating the need of a preprocessing node as a front end processing node. Approximate Markov chain analyses for the performance of the switching node with single input buffers is presented. The analyses are used to compute the time delay distribution of a cell leaving the node. A simulation tool is used to validate the analytical model. The simulation model is free from the critical assumptions which are necessary to develop the analytical model. It is shown that the analytical results closely match with the simulation results. This confirms the authenticity of the simulation model. We then study the performance of the switching node for various input buffer sizes. Low throughput with single input buffered switching node is observed; however, as the buffer size is increased from two to three the increase in throughput is more than 100%. No appreciable increase in node delay is noted when the buffer size is increased from two to three. We conclude that the optimum buffer size for large throughput is three and the maximum throughput with offered load of 0.9 and buffer size three is 0.75. This is because of head of line blocking phenomenon. A technique to overcome such inherent problem is presented. Several delays which a cell faces are analyzed and summarized below. The wait delay with buffer sizes one and two is high. However, the wait delay is negligible when the buffer size is increased beyond two. This is because increasing the buffer size reduces the head of line blocking. Thus more cells can move forward. Node delay and switched delay are comparable when the buffer size is greater than two. The delay offered is within a threshold range as noted for real time traffic. The delay is clock rate dependent and can be minimized by running the switching node at a higher clock speed. The worst delay noted for a switched cell for a node operating at a clock rate of 200 Mhz is 0.5 usec.
Show less - Date Issued
- 1992
- PURL
- http://purl.flvc.org/fcla/dt/12309
- Subject Headings
- Computer networks, Computer architecture, Packet switching (Data transmission)
- Format
- Document (PDF)
- Title
- Multi-Path Intelligent Virtual Mobile Nodes for Ad Hoc Networks.
- Creator
- Qian, Binbin, Wu, Jie, Florida Atlantic University, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
In mobile ad hoc networks, it is challenging to solve the standard problems encountered in fixed network because of the unpredictable motion of mobile nodes. Due to the lack of a fixed infrastructure to serve as the backbone of the network, it is difficult to manage nodes' locations and ensure the stable node performance. The virtual mobile node (VMN) abstraction that has been applied implements an virtual mobile node that consists of a set of real nodes traveling on one predetermined virtual...
Show moreIn mobile ad hoc networks, it is challenging to solve the standard problems encountered in fixed network because of the unpredictable motion of mobile nodes. Due to the lack of a fixed infrastructure to serve as the backbone of the network, it is difficult to manage nodes' locations and ensure the stable node performance. The virtual mobile node (VMN) abstraction that has been applied implements an virtual mobile node that consists of a set of real nodes traveling on one predetermined virtual path to collect messages and deliver them to the destinations when they meet. It conquers the unpredictable motion with virtual nodes' predictable motion. But it encounters unavoidable failure when all the nodes leave the VMN region and stop emulating the VMN. We extend the idea of the VMN abstraction to the Multi-path Intelligent Virtual Mobile Node (MIVMN) abstraction, which allows the messages to switch between multiple Hamiltonian paths to increase the message delivery ratio and decrease the failure rate of the virtual nodes. Through simulation results we show that the MIVMN abstraction successfully meets our goals.
Show less - Date Issued
- 2007
- PURL
- http://purl.flvc.org/fau/fd/FA00012542
- Subject Headings
- Routers (Computer networks), Computer network architectures, Wireless communication systems, Computer algorithms
- Format
- Document (PDF)
- Title
- Modeling and analysis of security.
- Creator
- Ajaj, Ola, Fernandez, Eduardo B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
Cloud Computing is a new computing model consists of a large pool of hardware and software resources on remote datacenters that are accessed through the Internet. Cloud Computing faces significant obstacles to its acceptance, such as security, virtualization, and lack of standardization. For Cloud standards, there is a long debate about their role, and more demands for Cloud standards are put on the table. The Cloud standardization landscape is so ambiguous. To model and analyze security...
Show moreCloud Computing is a new computing model consists of a large pool of hardware and software resources on remote datacenters that are accessed through the Internet. Cloud Computing faces significant obstacles to its acceptance, such as security, virtualization, and lack of standardization. For Cloud standards, there is a long debate about their role, and more demands for Cloud standards are put on the table. The Cloud standardization landscape is so ambiguous. To model and analyze security standards for Cloud Computing and web services, we have surveyed Cloud standards focusing more on the standards for security, and we classified them by groups of interests. Cloud Computing leverages a number of technologies such as: Web 2.0, virtualization, and Service Oriented Architecture (SOA). SOA uses web services to facilitate the creation of SOA systems by adopting different technologies despite their differences in formats and protocols. Several committees such as W3C and OASIS are developing standards for web services; their standards are rather complex and verbose. We have expressed web services security standards as patterns to make it easy for designers and users to understand their key points. We have written two patterns for two web services standards; WS-Secure Conversation, and WS-Federation. This completed an earlier work we have done on web services standards. We showed relationships between web services security standards and used them to solve major Cloud security issues, such as, authorization and access control, trust, and identity management. Close to web services, we investigated Business Process Execution Language (BPEL), and we addressed security considerations in BPEL and how to enforce them. To see how Cloud vendors look at web services standards, we took Amazon Web Services (AWS) as a case-study. By reviewing AWS documentations, web services security standards are barely mentioned. We highlighted some areas where web services security standards could solve some AWS limitations, and improve AWS security process. Finally, we studied the security guidance of two major Cloud-developing organizations, CSA and NIST. Both missed the quality of attributes offered by web services security standards. We expanded their work and added benefits of adopting web services security standards in securing the Cloud.
Show less - Date Issued
- 2013
- PURL
- http://purl.flvc.org/fau/fd/FA0004001
- Subject Headings
- Cloud Computing, Computational grids (Computer systems), Computer network architectures, Expert systems (Computer science), Web services -- Management
- Format
- Document (PDF)
- Title
- Towards a portal and search engine to facilitate academic and research collaboration in engineering and.
- Creator
- Bonilla Villarreal, Isaura Nathaly, Larrondo-Petrie, Maria M., Florida Atlantic University, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
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While international academic and research collaborations are of great importance at this time, it is not easy to find researchers in the engineering field that publish in languages other than English. Because of this disconnect, there exists a need for a portal to find Who’s Who in Engineering Education in the Americas. The objective of this thesis is to built an object-oriented architecture for this proposed portal. The Unified Modeling Language (UML) model developed in this thesis...
Show moreWhile international academic and research collaborations are of great importance at this time, it is not easy to find researchers in the engineering field that publish in languages other than English. Because of this disconnect, there exists a need for a portal to find Who’s Who in Engineering Education in the Americas. The objective of this thesis is to built an object-oriented architecture for this proposed portal. The Unified Modeling Language (UML) model developed in this thesis incorporates the basic structure of a social network for academic purposes. Reverse engineering of three social networks portals yielded important aspects of their structures that have been incorporated in the proposed UML model. Furthermore, the present work includes a pattern for academic social networks.
Show less - Date Issued
- 2014
- PURL
- http://purl.flvc.org/fau/fd/FA00004179, http://purl.flvc.org/fau/fd/FA00004179
- Subject Headings
- Computer network architecture, Critical theory, Embedded computer systems, Interdisciplinary research, Software architecture, UML (Computer science)
- Format
- Document (PDF)
- Title
- Processor allocation in hypercube computers.
- Creator
- Sua, Jose Reinier., Florida Atlantic University, Mahgoub, Imad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
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In this thesis, processor allocation in hypercube computers is viewed to consist of the following three components. The ability to have complete subcube recognition, the heuristics and methods to speedup the recognition of free subcubes, and the policy to schedule incoming tasks to reduce the fragmentation of the hypercube. We propose a fast processor allocation strategy for hypercube computers called modified gray code (MGC). The MGC strategy achieves full subcube recognition with much less...
Show moreIn this thesis, processor allocation in hypercube computers is viewed to consist of the following three components. The ability to have complete subcube recognition, the heuristics and methods to speedup the recognition of free subcubes, and the policy to schedule incoming tasks to reduce the fragmentation of the hypercube. We propose a fast processor allocation strategy for hypercube computers called modified gray code (MGC). The MGC strategy achieves full subcube recognition with much less complexity than the multiple gray code and the tree collapse strategies. It is the first bitmapped strategy to incorporate binary search and heuristics to locate free subcubes, and has a new scheduling policy which significantly reduces the fragmentation of the hypercube. Simulation programs have been developed to compare the performance of the MGC to that of the other strategies so as to demonstrate its effectiveness. Results obtained showed that, in most of the situations, the MGC outperformed the other strategies, especially when the system load is high. We have also investigated processor allocation methods for real-time systems with fault-tolerant considerations. We propose methods that can handle a minimum of two dynamically occurring faults, without slowdown in execution and with a constant slowdown in communication of 3.
Show less - Date Issued
- 1993
- PURL
- http://purl.flvc.org/fcla/dt/14904
- Subject Headings
- Hypercube networks (Computer networks), Computer architecture, Real-time data processing
- Format
- Document (PDF)
- Title
- Quorum based IP autoconfiguration in mobile ad hoc networks.
- Creator
- Xu, Tinghui., Florida Atlantic University, Wu, Jie, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
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IP address autoconfiguration poses a challenge for mobile ad-hoc networks (MANETs) because it has to be done to ensure correct routing. An IP autoconfiguration protocol that is based on quorum voting is proposed. Nodes are distributed configured when a write quorum can be collected. Making the compromise between message overhead and data consistency, quorum voting enforces data consistency by ensuring fresh read on every access so that each node is configured with a unique IP address. The...
Show moreIP address autoconfiguration poses a challenge for mobile ad-hoc networks (MANETs) because it has to be done to ensure correct routing. An IP autoconfiguration protocol that is based on quorum voting is proposed. Nodes are distributed configured when a write quorum can be collected. Making the compromise between message overhead and data consistency, quorum voting enforces data consistency by ensuring fresh read on every access so that each node is configured with a unique IP address. The protocol is scalable since the configuration information is maintained locally and no central server is involved. Extensive experiments are carried out comparing the configuration latency, message overhead and address reclamation cost between our protocol and existing stateful protocols. The simulation results show that nodes are configured in lower latency and the message overhead for maintaining the network is fairly low. Moreover, the proposed protocol greatly enhances the address availability by keeping proper redundancy.
Show less - Date Issued
- 2006
- PURL
- http://purl.flvc.org/fcla/dt/13362
- Subject Headings
- TCP/IP (Computer network protocol), Computer network architectures, Mobile communication systems, Wireless communication systems
- Format
- Document (PDF)