Current Search: Mandalia, Baiju Dhirajlal. (x)
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Title
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Specialized communications processor for layered protocols.
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Creator
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Mandalia, Baiju Dhirajlal., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
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Abstract/Description
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This dissertation describes an architecture for a special purpose communications protocol processor (CPP) that has been developed for open systems interconnection (OSI) type layered protocol processing. There exists a performance problem with the implementation and processing of communication protocols and the problem can have an impact on the throughput of future network interfaces. This problem revolves around two issues, (i) communication processing bottlenecks to fully utilize high speed...
Show moreThis dissertation describes an architecture for a special purpose communications protocol processor (CPP) that has been developed for open systems interconnection (OSI) type layered protocol processing. There exists a performance problem with the implementation and processing of communication protocols and the problem can have an impact on the throughput of future network interfaces. This problem revolves around two issues, (i) communication processing bottlenecks to fully utilize high speed transmission mediums; (ii) mechanism used in the implementation of communications functions. It is the objective of this work to address this problem and develop a first of its kind processor that is dedicated to protocol processing. At first trends in computer communications technology are discussed along with issues that influence throughput in front end controllers for network interfaces that support OSI. Network interface requirements and a survey of existing technology are presented and the state of the art of layered communication is evaluated and specific parameters that contribute to the performance of communications processors are identified. Based on this evaluation a new set of instructions is developed to support the necessary functions. Each component of the new architecture is explained with respect to the mechanism for implementation. The CPP contains special-purpose circuits dedicated to quick performance (e.g. single machine cycle execution) of functions needed to process header and frame information, functions which are repeatedly encountered in all protocol layers, and instructions designed to take advantage of these circuits. The header processing functions include priority branch determination functions, register bit reshaping (rearranging) functions, and instruction address processing functions. Frame processing functions include CRC (cyclic redundancy check) computations, bit insertion/deletion operations and special character detection operations. Justifications for new techniques are provided and their advantages over existing technology are discussed. A hardware register transfer level model is developed to simulate the new architecture for path length computations. A performance queueing model is also developed to analyze the processor characteristics with various load parameters. Finally, a brief discussion indicates how such a processor would apply to future network interfaces along with possible trends.
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Date Issued
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1989
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PURL
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http://purl.flvc.org/fcla/dt/11933
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Subject Headings
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Computer network protocols, Computer networks, Data transmission systems
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Format
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Document (PDF)
