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design and implementation of a simple master/slave interprocess-communication module
- Date Issued:
- 2000
- Summary:
- We explored the portability of various OS concepts to silicon. We wish to develop intellectual property blocks of various OS concepts, so that an embedded system designer has the option to mix and match. As a first step we have looked at inter-process communication (IPC) and Process Scheduling. We have implemented simple hardware building blocks for these. In our problem we utilize two processors, one each assigned as Master and Slave. Master is in control and implements the OS algorithms, while the Slave executes the user/application code. We show that these OS building blocks can be implemented in the hardware. Future effort of our group is to build a portfolio of OS IP blocks and explore optimization for various applications.
Title: | The design and implementation of a simple master/slave interprocess-communication module. |
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Name(s): |
Mandadi, Sanjay Reddy Florida Atlantic University, Degree grantor Shankar, Ravi, Thesis advisor College of Engineering and Computer Science Department of Computer and Electrical Engineering and Computer Science |
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Type of Resource: | text | |
Genre: | Electronic Thesis Or Dissertation | |
Issuance: | monographic | |
Date Issued: | 2000 | |
Publisher: | Florida Atlantic University | |
Place of Publication: | Boca Raton, Fla. | |
Physical Form: | application/pdf | |
Extent: | 141 p. | |
Language(s): | English | |
Summary: | We explored the portability of various OS concepts to silicon. We wish to develop intellectual property blocks of various OS concepts, so that an embedded system designer has the option to mix and match. As a first step we have looked at inter-process communication (IPC) and Process Scheduling. We have implemented simple hardware building blocks for these. In our problem we utilize two processors, one each assigned as Master and Slave. Master is in control and implements the OS algorithms, while the Slave executes the user/application code. We show that these OS building blocks can be implemented in the hardware. Future effort of our group is to build a portfolio of OS IP blocks and explore optimization for various applications. | |
Identifier: | 9780599813816 (isbn), 12690 (digitool), FADT12690 (IID), fau:9572 (fedora) | |
Collection: | FAU Electronic Theses and Dissertations Collection | |
Note(s): |
College of Engineering and Computer Science Thesis (M.S.)--Florida Atlantic University, 2000. |
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Subject(s): |
Operating systems (Computers) Computer networks--Design and construction Multiprocessors |
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Held by: | Florida Atlantic University Libraries | |
Persistent Link to This Record: | http://purl.flvc.org/fcla/dt/12690 | |
Sublocation: | Digital Library | |
Use and Reproduction: | Copyright © is held by the author, with permission granted to Florida Atlantic University to digitize, archive and distribute this item for non-profit research and educational purposes. Any reuse of this item in excess of fair use or other copyright exemptions requires permission of the copyright holder. | |
Use and Reproduction: | http://rightsstatements.org/vocab/InC/1.0/ | |
Host Institution: | FAU | |
Is Part of Series: | Florida Atlantic University Digital Library Collections. |