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VLSI implementable handwritten digit recognition system using artificial neural networks

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Date Issued:
1990
Summary:
A VLSI implementable feature extraction scheme, and two VLSI implementable algorithms for feature classification that should lead to a practical handwritten digit recognition system are proposed. The feature extraction algorithm exploits the concept of holon dynamics. Holons can be regarded as a group of cooperative processors with self-organizing property. Two types of artificial neural network-based classifiers have been evolved to classify these features. The United States Post Office handwritten digit database was used to train and test these networks. The first type of classifier system used limited interconnect multi-layer perceptron (LIMP) modules in a hierarchical configuration. Each classifier in this system was independently trained and designated to recognize a particular digit. A maximum of sixty-one digits were used to train and 464 digits which included the training set were used to test the classifiers. A cumulative performance of 93.75% (correctly recognized digits) was recorded. The second classifier system consists of a cluster of small multi-layer perceptron (CLUMP) networks. Each cell in this system was independently trained to trace the boundary between two or more digits in the recognition plane. A combination of these cells distinguish a digit from the rest. This system was trained with 1796 digits and tested on 1918 different set of digits. On the training set a performance of 95.55% was recorded while 79.35% resulted from the test data. These results, which are expected to further improve, are superior to those obtained by other researchers on the same database. This technique of digit recognition is general enough for application in the development of a universal alphanumeric recognition system. A hybrid VLSI system consisting of both analog and digital circuitry, and utilizing both Bi-CMOS and switched capacitor technologies has been designed. The design is intended for implementation with the current MOSIS 2 $\mu$m, double poly, double metal, and p-well CMOS technology. The integrated circuit is such that both classifier systems can be realized using the same chip.
Title: A VLSI implementable handwritten digit recognition system using artificial neural networks.
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Name(s): Agba, Lawrence C.
Florida Atlantic University, Degree grantor
Shankar, Ravi, Thesis advisor
College of Engineering and Computer Science
Department of Computer and Electrical Engineering and Computer Science
Type of Resource: text
Genre: Electronic Thesis Or Dissertation
Issuance: monographic
Date Issued: 1990
Publisher: Florida Atlantic University
Place of Publication: Boca Raton, Fla.
Physical Form: application/pdf
Extent: 123 p.
Language(s): English
Summary: A VLSI implementable feature extraction scheme, and two VLSI implementable algorithms for feature classification that should lead to a practical handwritten digit recognition system are proposed. The feature extraction algorithm exploits the concept of holon dynamics. Holons can be regarded as a group of cooperative processors with self-organizing property. Two types of artificial neural network-based classifiers have been evolved to classify these features. The United States Post Office handwritten digit database was used to train and test these networks. The first type of classifier system used limited interconnect multi-layer perceptron (LIMP) modules in a hierarchical configuration. Each classifier in this system was independently trained and designated to recognize a particular digit. A maximum of sixty-one digits were used to train and 464 digits which included the training set were used to test the classifiers. A cumulative performance of 93.75% (correctly recognized digits) was recorded. The second classifier system consists of a cluster of small multi-layer perceptron (CLUMP) networks. Each cell in this system was independently trained to trace the boundary between two or more digits in the recognition plane. A combination of these cells distinguish a digit from the rest. This system was trained with 1796 digits and tested on 1918 different set of digits. On the training set a performance of 95.55% was recorded while 79.35% resulted from the test data. These results, which are expected to further improve, are superior to those obtained by other researchers on the same database. This technique of digit recognition is general enough for application in the development of a universal alphanumeric recognition system. A hybrid VLSI system consisting of both analog and digital circuitry, and utilizing both Bi-CMOS and switched capacitor technologies has been designed. The design is intended for implementation with the current MOSIS 2 $\mu$m, double poly, double metal, and p-well CMOS technology. The integrated circuit is such that both classifier systems can be realized using the same chip.
Identifier: 12260 (digitool), FADT12260 (IID), fau:9165 (fedora)
Collection: FAU Electronic Theses and Dissertations Collection
Note(s): College of Engineering and Computer Science
Thesis (Ph.D.)--Florida Atlantic University, 1990.
Subject(s): Optical character recognition devices--Computer simulation
Pattern recognition systems--Computer simulation
Held by: Florida Atlantic University Libraries
Persistent Link to This Record: http://purl.flvc.org/fcla/dt/12260
Sublocation: Digital Library
Use and Reproduction: Copyright © is held by the author, with permission granted to Florida Atlantic University to digitize, archive and distribute this item for non-profit research and educational purposes. Any reuse of this item in excess of fair use or other copyright exemptions requires permission of the copyright holder.
Use and Reproduction: http://rightsstatements.org/vocab/InC/1.0/
Host Institution: FAU
Is Part of Series: Florida Atlantic University Digital Library Collections.