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Specialized communications processor for layered protocols

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Date Issued:
1989
Summary:
This dissertation describes an architecture for a special purpose communications protocol processor (CPP) that has been developed for open systems interconnection (OSI) type layered protocol processing. There exists a performance problem with the implementation and processing of communication protocols and the problem can have an impact on the throughput of future network interfaces. This problem revolves around two issues, (i) communication processing bottlenecks to fully utilize high speed transmission mediums; (ii) mechanism used in the implementation of communications functions. It is the objective of this work to address this problem and develop a first of its kind processor that is dedicated to protocol processing. At first trends in computer communications technology are discussed along with issues that influence throughput in front end controllers for network interfaces that support OSI. Network interface requirements and a survey of existing technology are presented and the state of the art of layered communication is evaluated and specific parameters that contribute to the performance of communications processors are identified. Based on this evaluation a new set of instructions is developed to support the necessary functions. Each component of the new architecture is explained with respect to the mechanism for implementation. The CPP contains special-purpose circuits dedicated to quick performance (e.g. single machine cycle execution) of functions needed to process header and frame information, functions which are repeatedly encountered in all protocol layers, and instructions designed to take advantage of these circuits. The header processing functions include priority branch determination functions, register bit reshaping (rearranging) functions, and instruction address processing functions. Frame processing functions include CRC (cyclic redundancy check) computations, bit insertion/deletion operations and special character detection operations. Justifications for new techniques are provided and their advantages over existing technology are discussed. A hardware register transfer level model is developed to simulate the new architecture for path length computations. A performance queueing model is also developed to analyze the processor characteristics with various load parameters. Finally, a brief discussion indicates how such a processor would apply to future network interfaces along with possible trends.
Title: Specialized communications processor for layered protocols.
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Name(s): Mandalia, Baiju Dhirajlal.
Florida Atlantic University, Degree grantor
Ilyas, Mohammad, Thesis advisor
College of Engineering and Computer Science
Department of Computer and Electrical Engineering and Computer Science
Type of Resource: text
Genre: Electronic Thesis Or Dissertation
Issuance: monographic
Date Issued: 1989
Publisher: Florida Atlantic University
Place of Publication: Boca Raton, Fla.
Physical Form: application/pdf
Extent: 192 p.
Language(s): English
Summary: This dissertation describes an architecture for a special purpose communications protocol processor (CPP) that has been developed for open systems interconnection (OSI) type layered protocol processing. There exists a performance problem with the implementation and processing of communication protocols and the problem can have an impact on the throughput of future network interfaces. This problem revolves around two issues, (i) communication processing bottlenecks to fully utilize high speed transmission mediums; (ii) mechanism used in the implementation of communications functions. It is the objective of this work to address this problem and develop a first of its kind processor that is dedicated to protocol processing. At first trends in computer communications technology are discussed along with issues that influence throughput in front end controllers for network interfaces that support OSI. Network interface requirements and a survey of existing technology are presented and the state of the art of layered communication is evaluated and specific parameters that contribute to the performance of communications processors are identified. Based on this evaluation a new set of instructions is developed to support the necessary functions. Each component of the new architecture is explained with respect to the mechanism for implementation. The CPP contains special-purpose circuits dedicated to quick performance (e.g. single machine cycle execution) of functions needed to process header and frame information, functions which are repeatedly encountered in all protocol layers, and instructions designed to take advantage of these circuits. The header processing functions include priority branch determination functions, register bit reshaping (rearranging) functions, and instruction address processing functions. Frame processing functions include CRC (cyclic redundancy check) computations, bit insertion/deletion operations and special character detection operations. Justifications for new techniques are provided and their advantages over existing technology are discussed. A hardware register transfer level model is developed to simulate the new architecture for path length computations. A performance queueing model is also developed to analyze the processor characteristics with various load parameters. Finally, a brief discussion indicates how such a processor would apply to future network interfaces along with possible trends.
Identifier: 11933 (digitool), FADT11933 (IID), fau:8852 (fedora)
Collection: FAU Electronic Theses and Dissertations Collection
Note(s): College of Engineering and Computer Science
Thesis (Ph.D.)--Florida Atlantic University, 1989.
Subject(s): Computer network protocols
Computer networks
Data transmission systems
Held by: Florida Atlantic University Libraries
Persistent Link to This Record: http://purl.flvc.org/fcla/dt/11933
Sublocation: Digital Library
Use and Reproduction: Copyright © is held by the author, with permission granted to Florida Atlantic University to digitize, archive and distribute this item for non-profit research and educational purposes. Any reuse of this item in excess of fair use or other copyright exemptions requires permission of the copyright holder.
Use and Reproduction: http://rightsstatements.org/vocab/InC/1.0/
Host Institution: FAU
Is Part of Series: Florida Atlantic University Digital Library Collections.