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efficient and scalable core allocation strategy for multicore systems

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Date Issued:
2011
Summary:
Multiple threads can run concurrently on multiple cores in a multicore system and improve performance/power ratio. However, effective core allocation in multicore and manycore systems is very challenging. In this thesis, we propose an effective and scalable core allocation strategy for multicore systems to achieve optimal core utilization by reducing both internal and external fragmentations. Our proposed strategy helps evenly spreading the servicing cores on the chip to facilitate better heat dissipation. We introduce a multi-stage power management scheme to reduce the total power consumption by managing the power states of the cores. We simulate three multicore systems, with 16, 32, and 64 cores, respectively, using synthetic workload. Experimental results show that our proposed strategy performs better than Square-shaped, Rectangle-shaped, L-Shaped, and Hybrid (contiguous and non-contiguous) schemes in multicore systems in terms of fragmentation and completion time. Among these strategies, our strategy provides a better heat dissipation mechanism.
Title: An efficient and scalable core allocation strategy for multicore systems.
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Name(s): Rani, Manira S.
College of Engineering and Computer Science
Department of Computer and Electrical Engineering and Computer Science
Type of Resource: text
Genre: Electronic Thesis Or Dissertation
Date Issued: 2011
Publisher: Florida Atlantic University
Physical Form: electronic
Extent: x, 119 p. : ill. (some col.)
Language(s): English
Summary: Multiple threads can run concurrently on multiple cores in a multicore system and improve performance/power ratio. However, effective core allocation in multicore and manycore systems is very challenging. In this thesis, we propose an effective and scalable core allocation strategy for multicore systems to achieve optimal core utilization by reducing both internal and external fragmentations. Our proposed strategy helps evenly spreading the servicing cores on the chip to facilitate better heat dissipation. We introduce a multi-stage power management scheme to reduce the total power consumption by managing the power states of the cores. We simulate three multicore systems, with 16, 32, and 64 cores, respectively, using synthetic workload. Experimental results show that our proposed strategy performs better than Square-shaped, Rectangle-shaped, L-Shaped, and Hybrid (contiguous and non-contiguous) schemes in multicore systems in terms of fragmentation and completion time. Among these strategies, our strategy provides a better heat dissipation mechanism.
Identifier: 740802036 (oclc), 3172698 (digitool), FADT3172698 (IID), fau:3663 (fedora)
Note(s): by Manira S. Rani.
Thesis (M.S.C.S.)--Florida Atlantic University, 2011.
Includes bibliography.
Electronic reproduction. Boca Raton, Fla., 2011. Mode of access: World Wide Web.
Subject(s): Modularity (Engineering)
Multicasting (Computer networks)
Convergence (Telecommunication)
Computer architecture
Memory management (Computer science)
Cache memory
Persistent Link to This Record: http://purl.flvc.org/FAU/3172698
Use and Reproduction: http://rightsstatements.org/vocab/InC/1.0/
Host Institution: FAU