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Handwritten digit recognition using neural network integrated chips

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Date Issued:
1992
Summary:
Development of a handwritten digit recognition system for real time applications is a feasible goal today due to the many advances pertinent to VLSI. In this research we address the issue of mapping our neural net classification algorithm to Intel's commercially available general purpose Neural Network Chip, 80170NX (ETANN). Most of the proposed techniques used for character recognition have been validated by our research group using various software and hardware simulation methods. The objective of this thesis was to develop a practical hardware system to perform the final step of classification of handwritten digits in an Optical Character Recognition (OCR) system. Such a hardware implementation would increase the classification speed and also would permit testing in a real life application environment. An efficient mapping scheme was evolved to map the modules of a limited interconnect classification algorithm, CLUMP, to a minimum number of ETANN chips. The hardware modules to interface the ETANN chips to MC68000 education board have been developed and tested. The proposed system is estimated to process the features input in 336 $\mu$s, for our specific implementation, with 12 clock phases and 3 ETANN chips.
Title: Handwritten digit recognition using neural network integrated chips.
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Name(s): Bidari, Ravindra Chandrashekar.
Florida Atlantic University, Degree grantor
Shankar, Ravi, Thesis advisor
Type of Resource: text
Genre: Electronic Thesis Or Dissertation
Issuance: monographic
Date Issued: 1992
Publisher: Florida Atlantic University
Place of Publication: Boca Raton, Fla.
Physical Form: application/pdf
Extent: 126 p.
Language(s): English
Summary: Development of a handwritten digit recognition system for real time applications is a feasible goal today due to the many advances pertinent to VLSI. In this research we address the issue of mapping our neural net classification algorithm to Intel's commercially available general purpose Neural Network Chip, 80170NX (ETANN). Most of the proposed techniques used for character recognition have been validated by our research group using various software and hardware simulation methods. The objective of this thesis was to develop a practical hardware system to perform the final step of classification of handwritten digits in an Optical Character Recognition (OCR) system. Such a hardware implementation would increase the classification speed and also would permit testing in a real life application environment. An efficient mapping scheme was evolved to map the modules of a limited interconnect classification algorithm, CLUMP, to a minimum number of ETANN chips. The hardware modules to interface the ETANN chips to MC68000 education board have been developed and tested. The proposed system is estimated to process the features input in 336 $\mu$s, for our specific implementation, with 12 clock phases and 3 ETANN chips.
Identifier: 14838 (digitool), FADT14838 (IID), fau:11626 (fedora)
Collection: FAU Electronic Theses and Dissertations Collection
Note(s): College of Engineering and Computer Science
Thesis (M.S.)--Florida Atlantic University, 1992.
Subject(s): Optical character recognition devices--Computer simulation
Pattern recognition systems--Computer simulation
Held by: Florida Atlantic University Libraries
Persistent Link to This Record: http://purl.flvc.org/fcla/dt/14838
Sublocation: Digital Library
Use and Reproduction: Copyright © is held by the author, with permission granted to Florida Atlantic University to digitize, archive and distribute this item for non-profit research and educational purposes. Any reuse of this item in excess of fair use or other copyright exemptions requires permission of the copyright holder.
Use and Reproduction: http://rightsstatements.org/vocab/InC/1.0/
Host Institution: FAU
Is Part of Series: Florida Atlantic University Digital Library Collections.