Current Search: Florida Atlantic University (x) » Computer networks (x)
View All Items
Pages
- Title
- A REFERENCE ARCHITECTURE FOR NETWORK FUNCTION VIRTUALIZATION.
- Creator
- Alwakeel, Ahmed M., Fernandez, Eduardo B., Florida Atlantic University, Department of Computer and Electrical Engineering and Computer Science, College of Engineering and Computer Science
- Abstract/Description
-
Cloud computing has provided many services to potential consumers, one of these services being the provision of network functions using virtualization. Network Function Virtualization is a new technology that aims to improve the way we consume network services. Legacy networking solutions are different because consumers must buy and install various hardware equipment. In NFV, networks are provided to users as a software as a service (SaaS). Implementing NFV comes with many benefits, including...
Show moreCloud computing has provided many services to potential consumers, one of these services being the provision of network functions using virtualization. Network Function Virtualization is a new technology that aims to improve the way we consume network services. Legacy networking solutions are different because consumers must buy and install various hardware equipment. In NFV, networks are provided to users as a software as a service (SaaS). Implementing NFV comes with many benefits, including faster module development for network functions, more rapid deployment, enhancement of the network on cloud infrastructures, and lowering the overall cost of having a network system. All these benefits can be achieved in NFV by turning physical network functions into Virtual Network Functions (VNFs). However, since this technology is still a new network paradigm, integrating this virtual environment into a legacy environment or even moving all together into NFV reflects on the complexity of adopting the NFV system. Also, a network service could be composed of several components that are provided by different service providers; this also increases the complexity and heterogeneity of the system. We apply abstract architectural modeling to describe and analyze the NFV architecture. We use architectural patterns to build a flexible NFV architecture to build a Reference Architecture (RA) for NFV that describe the system and how it works. RAs are proven to be a powerful solution to abstract complex systems that lacks semantics. Having an RA for NFV helps us understand the system and how it functions. It also helps us to expose the possible vulnerabilities that may lead to threats toward the system. In the future, this RA could be enhanced into SRA by adding misuse and security patterns for it to cover potential threats and vulnerabilities in the system. Our audiences are system designers, system architects, and security professionals who are interested in building a secure NFV system.
Show less - Date Issued
- 2020
- PURL
- http://purl.flvc.org/fau/fd/FA00013434
- Subject Headings
- Virtual computer systems, Cloud computing, Computer network architectures, Computer networks
- Format
- Document (PDF)
- Title
- Analysis of quality of service (QoS) in WiMAX networks.
- Creator
- Talwalkar, Rohit., College of Engineering and Computer Science, Florida Atlantic University, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
In last few years there has been significant growth in the area of wireless communication. Quality of Service (QoS) has become an important consideration for supporting variety of applications that utilize the network resources. These applications include voice over IP, multimedia services, like, video streaming, video conferencing etc. IEEE 802.16/WiMAX is a new network which is designed with quality of service in mind. This thesis focuses on analysis of quality of service as implemented by...
Show moreIn last few years there has been significant growth in the area of wireless communication. Quality of Service (QoS) has become an important consideration for supporting variety of applications that utilize the network resources. These applications include voice over IP, multimedia services, like, video streaming, video conferencing etc. IEEE 802.16/WiMAX is a new network which is designed with quality of service in mind. This thesis focuses on analysis of quality of service as implemented by the WiMAX networks. First, it presents the details of the quality of service architecture in WiMAX network. In the analysis, a WiMAX module developed based on popular network simulator ns-2, is used. Various real life scenarios like voice call, video streaming are setup in the simulation environment. Parameters that indicate quality of service, such as, throughput, packet loss, average jitter and average delay, are analyzed for different types of service flows as defined in WiMAX. Results indicate that better quality of service is achieved by using service flows designed for specific applications.
Show less - Date Issued
- 2008
- PURL
- http://purl.flvc.org/fcla/flaent/EN00154040/68_2/98p0143h.pdf, http://purl.flvc.org/FAU/58012
- Subject Headings
- Wireless communication systems, Broadband communication systems, Wireless LANs, Design and construction, Computer networks, Management, Quality control
- Format
- Document (PDF)
- Title
- Checkpointing schemes for high-performance parallel applications in networks of workstations.
- Creator
- He, Fusen., Florida Atlantic University, Wu, Jie
- Abstract/Description
-
In this thesis, a low interprocessor communication overhead and high performance data parallelism parallel application model in a network of workstations (NOWs) is proposed. Checkpointing and rollback technologies are used in this model for performance enhancement purpose. The proposed model is analyzed both theoretically and numerically. The simulation results show that a high performance of the parallel application model is expected. As a case study, the proposed model is used to the...
Show moreIn this thesis, a low interprocessor communication overhead and high performance data parallelism parallel application model in a network of workstations (NOWs) is proposed. Checkpointing and rollback technologies are used in this model for performance enhancement purpose. The proposed model is analyzed both theoretically and numerically. The simulation results show that a high performance of the parallel application model is expected. As a case study, the proposed model is used to the parallel Everglades Landscape Fire Model (ELFM) code which was developed by South Florida Water Management District (SFWMD). The parallel programming environment is Message-Passing Interface (MPI). A synchronous checkpointing and rollback mechanism is used to handle the spread of fire which is a dynamic and irregular component of the model. Results show that the performance of the parallel ELFM using MPI is significantly enhanced by the application of checkpointing and rollback.
Show less - Date Issued
- 1998
- PURL
- http://purl.flvc.org/fcla/dt/15597
- Subject Headings
- Computer networks, Electronic data processing--Distributed processing, Fault-tolerant computing
- Format
- Document (PDF)
- Title
- A communication protocol for acoustic ad-hoc networks of autonomous underwater vehicles.
- Creator
- Baud, Bertrand., Florida Atlantic University, An, Edgar
- Abstract/Description
-
This thesis presents the design and implementation of an underwater network communication protocol. The goal is to enable several autonomous underwater vehicles (AUVs) to form a communication network and to exchange information during at-sea missions. The focus of this work is on the upper layers of the protocol: Network and Transport layers. Routing is a critical issue since all the nodes forming the network are moving. A study and comparison of existing routing algorithms is presented. Two...
Show moreThis thesis presents the design and implementation of an underwater network communication protocol. The goal is to enable several autonomous underwater vehicles (AUVs) to form a communication network and to exchange information during at-sea missions. The focus of this work is on the upper layers of the protocol: Network and Transport layers. Routing is a critical issue since all the nodes forming the network are moving. A study and comparison of existing routing algorithms is presented. Two routing algorithms have been chosen and implemented in the network layer of the protocol: Flooding and Destination Sequence Distance Vector Routing. The protocol has been tested on several types of simulated missions. An analysis of the results is proposed for each mission.
Show less - Date Issued
- 2001
- PURL
- http://purl.flvc.org/fcla/dt/12774
- Subject Headings
- Underwater acoustics, Submersibles, Computer networks
- Format
- Document (PDF)
- Title
- A connected dominating-set-based routing in ad hoc wireless networks.
- Creator
- Gao, Ming., Florida Atlantic University, Wu, Jie
- Abstract/Description
-
In ad hoc wireless networks, routing protocols are challenged with establishing and maintaining multihop routes in the face of mobility, bandwidth limitation and power constraints. Routing based on a connected dominating set is a promising approach, where the searching space for a router reduced to nodes in the set. A set is dominating if all the nodes in the system are either in the dominating set or adjacent to some nodes in the dominating set. In this thesis, we propose a method of...
Show moreIn ad hoc wireless networks, routing protocols are challenged with establishing and maintaining multihop routes in the face of mobility, bandwidth limitation and power constraints. Routing based on a connected dominating set is a promising approach, where the searching space for a router reduced to nodes in the set. A set is dominating if all the nodes in the system are either in the dominating set or adjacent to some nodes in the dominating set. In this thesis, we propose a method of calculating power-aware connected dominating set. Our simulation results show that the proposed approach outperforms several existing approaches in terms of life span of the network. We also discuss mobility management in dominating-set-based networks. Three operations are considered which are mobile host switch on, mobile host switch off and mobile host movement. We also discuss the use of dynamic source routing as an application of the connected dominating set.
Show less - Date Issued
- 2001
- PURL
- http://purl.flvc.org/fcla/dt/12780
- Subject Headings
- Mobile computing, Computer networks, Computer algorithms
- Format
- Document (PDF)
- Title
- Design and implementation of a wireless ad hoc network.
- Creator
- Neelakanta, Mahesh., Florida Atlantic University, Hsu, Sam, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
This thesis addresses issues faced in the practical implementation of a wireless ad hoc network (WAHN) protocol for data transmission. This study focuses on: (1) Evaluating existing hardware and software options available for the WAHN implementation. (2) Appraising the issues faced while implementing a practical wireless ad hoc protocol. (3) Applying a set of MAC protocol specifications developed for a wireless ad hoc data network to a practical test network. Specific to the above topics of...
Show moreThis thesis addresses issues faced in the practical implementation of a wireless ad hoc network (WAHN) protocol for data transmission. This study focuses on: (1) Evaluating existing hardware and software options available for the WAHN implementation. (2) Appraising the issues faced while implementing a practical wireless ad hoc protocol. (3) Applying a set of MAC protocol specifications developed for a wireless ad hoc data network to a practical test network. Specific to the above topics of interest, the following research tasks are performed: (1) An elaborate survey and relevant discussions on wireless MAC protocols. (2) A comprehensive study comparing various wireless transceivers is performed. Range, data rate, frequency, interfacing method and cost are the factors compared. (3) A simple, low-cost and low baud-rate transceiver is modified with appropriate interface circuits to support wireless communications. A more advanced transceiver is also considered and used for the software foundation of a practical implementation of the ad hoc and MAC protocols. The studies enable assessing the problems faced during the implementation and suggest solutions to resolve these problems. Further areas for study are also discussed.
Show less - Date Issued
- 1998
- PURL
- http://purl.flvc.org/fcla/dt/15615
- Subject Headings
- Wireless communication systems, Data transmission systems, Computer networks
- Format
- Document (PDF)
- Title
- Effect of message latency in an ATM network on signal processing.
- Creator
- Weber, Ralph Lawrence., Florida Atlantic University, Ilyas, Mohammad
- Abstract/Description
-
Signal processing requires a steady flow of sampled data to be able to properly manipulate the signal to get the desired output. By using Asynchronous Transfer Mode (ATM) networks, it is possible to divide signal processing amongst a number of stations where each station can be specialized to a single function. Unfortunately, most commercially available ATM Network Interface Cards (NIC) only support message mode ATM Adaptation Layer 5 (AAL5) which is unsuitable to signal processing due to the...
Show moreSignal processing requires a steady flow of sampled data to be able to properly manipulate the signal to get the desired output. By using Asynchronous Transfer Mode (ATM) networks, it is possible to divide signal processing amongst a number of stations where each station can be specialized to a single function. Unfortunately, most commercially available ATM Network Interface Cards (NIC) only support message mode ATM Adaptation Layer 5 (AAL5) which is unsuitable to signal processing due to the delays of having to wait for an entire message to be formed prior to sending. It is shown that by using an ATM NIC using streaming mode AAL5, where cells are sent as soon as enough data to create an ATM cell of 48 bytes, leads to better quality signal processing. It is also shown that the message latency (time it takes for a message to traverse the network) is reduced by using streaming mode AAL5.
Show less - Date Issued
- 1997
- PURL
- http://purl.flvc.org/fcla/dt/15371
- Subject Headings
- Signal processing, Asynchronous transfer mode, Telecommunication--Message processing, Computer networks
- Format
- Document (PDF)
- Title
- Estimation of information-theoretics-based delay-bounds in ATM networks.
- Creator
- Wei, Liqun., Florida Atlantic University, Hsu, Sam, Neelakanta, Perambur S., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
This thesis addresses a method of deducing the statistical upper and lower bounds associated with the cell-transfer delay variations (CDVs) encountered by the cells transmitted in the asynchronous transfer mode (ATM) networks due to cell losses. This study focuses on: (1) Estimating CDV arising from multiplexing/switching for both constant bit rate and variable bit rate services via simulations. (2) Deducing an information-theoretics based new technique to get an insight of the combined BER...
Show moreThis thesis addresses a method of deducing the statistical upper and lower bounds associated with the cell-transfer delay variations (CDVs) encountered by the cells transmitted in the asynchronous transfer mode (ATM) networks due to cell losses. This study focuses on: (1) Estimating CDV arising from multiplexing/switching for both constant bit rate and variable bit rate services via simulations. (2) Deducing an information-theoretics based new technique to get an insight of the combined BER-induced and multiplexing/switching-induced CDVs in ATM networks. Algorithms on the CDV statistics are derived and the lower and upper bounds of the statistics are obtained via simulations in respect of CBR and VBR traffics. These bounds bounds are useful in the cell-admission control (CAC) strategies adapted in ATM transmissions. Inferential remarks indicating the effects of traffic parameters (such as bandwidth, burstiness etc.) on the values of the statistical bounds are presented, and scope for further work is indicated.
Show less - Date Issued
- 1997
- PURL
- http://purl.flvc.org/fcla/dt/15444
- Subject Headings
- Asynchronous transfer mode, Telecommunication, Computer networks, Broadband communication systems
- Format
- Document (PDF)
- Title
- Fault-tolerant distributed shared memories.
- Creator
- Brown, Larry., Florida Atlantic University, Wu, Jie, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
Distributed shared memory (DSM) implements a shared-memory programming interface on message-passing hardware. The shared-memory programming paradigm offers several advantages over the message-passing paradigm. DSM is recognized as an important technology for massively parallel computing. However, as the number of processors in a system increases, the probability of a failure increases. To be widely useful, the DSM must be able to tolerate failures. This dissertation presents a method of...
Show moreDistributed shared memory (DSM) implements a shared-memory programming interface on message-passing hardware. The shared-memory programming paradigm offers several advantages over the message-passing paradigm. DSM is recognized as an important technology for massively parallel computing. However, as the number of processors in a system increases, the probability of a failure increases. To be widely useful, the DSM must be able to tolerate failures. This dissertation presents a method of implementing fault-tolerant DSM (FTDSM) that is based on the idea of a snooper. The snooper monitors DSM protocol messages and keeps a backup of the current state of the DSM. The snooper can respond on behalf of failed processors. The snooper-based FTDSM is an improvement over existing FTDSMs because it is based on the efficient dynamic distributed manager DSM algorithm, does not require the repair of a failed processor in access the DSM, and does not query all nodes to rebuild the state of the DSM. Three snooper-based FTDSM systems are developed. The single-snooper (SS) FTDSM has one snooper and is restricted to a broadcast network. Additional snoopers are added in the multiple-snooper (MS) FTDSM to improve performance. Two-phase commit (2PC) protocols are developed to coordinate the activities of the snoopers, and a special data structure is used to store causality information to reduce the amount of snooper activity. Snooping is integrated with each processor in the integrated snooper (IS) FTDSM. The IS FTDSM is scalable because it is not restricted to a broadcast network. The concept of dynamic snooping is introduced for the IS FTDSM and several snooper migration algorithms are studied. Several recovery algorithms are developed to allow failed processors to rejoin the system. The properties of data structures used to locate owners and snoopers are studied and used to prove that the system can tolerate any single fault. A flexible method of integrating application-level recovery with the FTDSM is presented, and a reliability analysis is conducted using a Markov-chain modeling tool to show that the snooper-based FTDSM is a cost effective way to improve the reliability of DSM.
Show less - Date Issued
- 1993
- PURL
- http://purl.flvc.org/fcla/dt/12349
- Subject Headings
- Fault-tolerant computing, Electronic data processing--Distributed processing, Parallel processing (Electronic computers), Computer networks
- Format
- Document (PDF)
- Title
- GENERIC NETWORK EXECUTIVE.
- Creator
- SARMIENTO, JESUS LEOPOLDO., Florida Atlantic University, Fernandez, Eduardo B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
A Generic Network Executive (GNE) package is presented in this thesis. It encompasses the strategy and methodology to follow when implementing data communication software. GNE was designed for portability and high utilization of available resources (efficiency). It does not impose implementation constraints because it does not include features specific to any system (hardware or operating system}. It uses a highly concurrent process model with a pipelined structure . It is not protocol...
Show moreA Generic Network Executive (GNE) package is presented in this thesis. It encompasses the strategy and methodology to follow when implementing data communication software. GNE was designed for portability and high utilization of available resources (efficiency). It does not impose implementation constraints because it does not include features specific to any system (hardware or operating system}. It uses a highly concurrent process model with a pipelined structure . It is not protocol dependent, rather it is meant to be used to implement low level services for higher level communic ation protocols. It is intended to provide interprocess communication in distributed systems by coupling application programs with a general purpose packet delivery system, i.e., a datagram service.
Show less - Date Issued
- 1986
- PURL
- http://purl.flvc.org/fcla/dt/14321
- Subject Headings
- Computer networks, Data transmission systems
- Format
- Document (PDF)
- Title
- A high-speed switching node architecture for ATM networks.
- Creator
- Syed, Majid Ali, Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
This research is aimed towards the concept of a new switching node architecture for cell-switched Asynchronous Transfer Mode (ATM) networks. The proposed architecture has several distinguishing features when compared with existing Banyan based switching node. It has a cylindrical structure as opposed to a flat structure as found in Banyans. The wrap around property results in better link utilization as compared with existing Banyans beside resulting in reduced average route length. Simplified...
Show moreThis research is aimed towards the concept of a new switching node architecture for cell-switched Asynchronous Transfer Mode (ATM) networks. The proposed architecture has several distinguishing features when compared with existing Banyan based switching node. It has a cylindrical structure as opposed to a flat structure as found in Banyans. The wrap around property results in better link utilization as compared with existing Banyans beside resulting in reduced average route length. Simplified digit controlled routing is maintained as found in Banyans. The cylindrical nature of the architecture, results in pipeline activity. Such architecture tends to sort the traffic to a higher address, eliminating the need of a preprocessing node as a front end processing node. Approximate Markov chain analyses for the performance of the switching node with single input buffers is presented. The analyses are used to compute the time delay distribution of a cell leaving the node. A simulation tool is used to validate the analytical model. The simulation model is free from the critical assumptions which are necessary to develop the analytical model. It is shown that the analytical results closely match with the simulation results. This confirms the authenticity of the simulation model. We then study the performance of the switching node for various input buffer sizes. Low throughput with single input buffered switching node is observed; however, as the buffer size is increased from two to three the increase in throughput is more than 100%. No appreciable increase in node delay is noted when the buffer size is increased from two to three. We conclude that the optimum buffer size for large throughput is three and the maximum throughput with offered load of 0.9 and buffer size three is 0.75. This is because of head of line blocking phenomenon. A technique to overcome such inherent problem is presented. Several delays which a cell faces are analyzed and summarized below. The wait delay with buffer sizes one and two is high. However, the wait delay is negligible when the buffer size is increased beyond two. This is because increasing the buffer size reduces the head of line blocking. Thus more cells can move forward. Node delay and switched delay are comparable when the buffer size is greater than two. The delay offered is within a threshold range as noted for real time traffic. The delay is clock rate dependent and can be minimized by running the switching node at a higher clock speed. The worst delay noted for a switched cell for a node operating at a clock rate of 200 Mhz is 0.5 usec.
Show less - Date Issued
- 1992
- PURL
- http://purl.flvc.org/fcla/dt/12309
- Subject Headings
- Computer networks, Computer architecture, Packet switching (Data transmission)
- Format
- Document (PDF)
- Title
- Learning in connectionist networks using the Alopex algorithm.
- Creator
- Venugopal, Kootala Pattath., Florida Atlantic University, Pandya, Abhijit S., Sudhakar, Raghavan, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
The Alopex algorithm is presented as a universal learning algorithm for connectionist models. It is shown that the Alopex procedure could be used efficiently as a supervised learning algorithm for such models. The algorithm is demonstrated successfully on a variety of network architectures. Such architectures include multilayer perceptrons, time-delay models, asymmetric, fully recurrent networks and memory neuron networks. The learning performance as well as the generation capability of the...
Show moreThe Alopex algorithm is presented as a universal learning algorithm for connectionist models. It is shown that the Alopex procedure could be used efficiently as a supervised learning algorithm for such models. The algorithm is demonstrated successfully on a variety of network architectures. Such architectures include multilayer perceptrons, time-delay models, asymmetric, fully recurrent networks and memory neuron networks. The learning performance as well as the generation capability of the Alopex algorithm are compared with those of the backpropagation procedure, concerning a number of benchmark problems, and it is shown that the Alopex has specific advantages over the backpropagation. Two new architectures (gain layer schemes) are proposed for the on-line, direct adaptive control of dynamical systems using neural networks. The proposed schemes are shown to provide better dynamic response and tracking characteristics, than the other existing direct control schemes. A velocity reference scheme is introduced to improve the dynamic response of on-line learning controllers. The proposed learning algorithm and architectures are studied on three practical problems; (i) Classification of handwritten digits using Fourier Descriptors; (ii) Recognition of underwater targets from sonar returns, considering temporal dependencies of consecutive returns and (iii) On-line learning control of autonomous underwater vehicles, starting with random initial conditions. Detailed studies are conducted on the learning control applications. Effect of the network learning rate on the tracking performance and dynamic response of the system are investigated. Also, the ability of the neural network controllers to adapt to slow and sudden varying parameter disturbances and measurement noise is studied in detail.
Show less - Date Issued
- 1993
- PURL
- http://purl.flvc.org/fcla/dt/12325
- Subject Headings
- Computer algorithms, Computer networks, Neural networks (Computer science), Machine learning
- Format
- Document (PDF)
- Title
- A next generation computer network communications architecture.
- Creator
- Thor, Bernice Lynn., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
A Next Generation Computer Network Communications Architecture, CNCA, is developed in this thesis. Existing communication techniques and available networking technologies are explored. This provides the background information for the development of the architecture. Hardware, protocol, and interface requirements are addressed to provide a practical architecture for supporting high speed communications beyond current implementations. A reduction process is then performed to extract the optimal...
Show moreA Next Generation Computer Network Communications Architecture, CNCA, is developed in this thesis. Existing communication techniques and available networking technologies are explored. This provides the background information for the development of the architecture. Hardware, protocol, and interface requirements are addressed to provide a practical architecture for supporting high speed communications beyond current implementations. A reduction process is then performed to extract the optimal components for the CNCA platform. The resulting architecture describes a next generation communications device that is capable of very fast switching and fast processing of information. The architecture interfaces with existing products, and provides extensive flexibility. This protects existing equipment investments, and supports future enhancements.
Show less - Date Issued
- 1991
- PURL
- http://purl.flvc.org/fcla/dt/14726
- Subject Headings
- Computer network architectures, Computer networks
- Format
- Document (PDF)
- Title
- OPTIMAL SCHEDULING OF PROCESSES FOR A NETWORK OF TRANSPUTERS (MULTIPROCESSOR, OCCAM, CONCURRENT PROCESSING).
- Creator
- NGO, TON ANH., Florida Atlantic University, Fernandez, Eduardo B., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
Concurrency at both the hardware and software level has recently been considered as the solution to the classic Von Neuman bottleneck in system design. Introduced by Inmos, the Occam language and the Transputer microprocessor provide simple and elegant building blocks for a concurrent system. This thesis proposes a set of algorithms to find an optimal deterministic schedule for an Occam program executed on a network of Transputers. Also discussed are features of the network relevant to the...
Show moreConcurrency at both the hardware and software level has recently been considered as the solution to the classic Von Neuman bottleneck in system design. Introduced by Inmos, the Occam language and the Transputer microprocessor provide simple and elegant building blocks for a concurrent system. This thesis proposes a set of algorithms to find an optimal deterministic schedule for an Occam program executed on a network of Transputers. Also discussed are features of the network relevant to the problem of scheduling, and a complete example is provided to illustrate the scheduler. The approaches described can be used as a basis for implementing a flexible general purpose multiprocessor system.
Show less - Date Issued
- 1986
- PURL
- http://purl.flvc.org/fcla/dt/14351
- Subject Headings
- Multiprocessors, Computer networks
- Format
- Document (PDF)
- Title
- Performance analysis of a new object-based I/O architecture for PCs and workstations.
- Creator
- Huynh, Khoa Dang., Florida Atlantic University, Khoshgoftaar, Taghi M., College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
In this dissertation, an object-based I/O architecture for personal computers (PCs) and workstations is proposed. The proposed architecture allows the flexibility of having I/O processing performed as much as possible by intelligent I/O adapters, or by the host processor, or by any processor in the system, depending on application requirements and underlying hardware capabilities. It keeps many good features of current I/O architectures, while providing more flexibility to take advantage of...
Show moreIn this dissertation, an object-based I/O architecture for personal computers (PCs) and workstations is proposed. The proposed architecture allows the flexibility of having I/O processing performed as much as possible by intelligent I/O adapters, or by the host processor, or by any processor in the system, depending on application requirements and underlying hardware capabilities. It keeps many good features of current I/O architectures, while providing more flexibility to take advantage of new hardware technologies, promote architectural openness, provide better performance and higher reliability. The proposed architecture introduces a new definition of I/O subsystems and makes use of concurrent object-oriented technology. It combines the notions of object and thread into something called an active object. All concurrency abstractions required by the proposed architecture are provided through external libraries on top of existing sequential object-oriented languages, without any changes to the syntax and semantics of these languages. We also evaluate the performance of optimal implementations of the proposed I/O architecture against other I/O architectures in three popular, PC-based, distributed environments: network file server, video server, and video conferencing. Using the RESearch Queueing Modeling Environment (RESQME), we have developed detailed simulation models for various implementations of the proposed I/O architecture and two other existing I/O architectures: a conventional, interrupt-based I/O architecture and a peer-to-peer I/O architecture. Our simulation results indicate that, on several different hardware platforms, the proposed I/O architecture outperforms both existing architectures in all three distributed environments considered.
Show less - Date Issued
- 1994
- PURL
- http://purl.flvc.org/fcla/dt/12386
- Subject Headings
- Local area networks (Computer networks), Computer input-output equipment, Computer networks, Videoconferencing, Client/server computing, Object-oriented programming (Computer science)
- Format
- Document (PDF)
- Title
- PERFORMANCE EVALUATION OF THE EFFECTS OF MESSAGE SEGMENTATION IN TANDEM NODE COMPUTER NETWORKS.
- Creator
- LAMANNA, PETER JOHN., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
Analytical and simulation performance evaluation results are presented on the effects of message segmentation and the validity of the Independence Assumption when applied to analytically modeling tandem node computer networks. Simulation results indicate that increasing message segmentation threshold will increase the network traffic intensity and consequently the total packet delay. Simulation and analytical results for total packet delay compared well only at low traffic intensities. At...
Show moreAnalytical and simulation performance evaluation results are presented on the effects of message segmentation and the validity of the Independence Assumption when applied to analytically modeling tandem node computer networks. Simulation results indicate that increasing message segmentation threshold will increase the network traffic intensity and consequently the total packet delay. Simulation and analytical results for total packet delay compared well only at low traffic intensities. At higher traffic intensities the discrepancy is due to the Independence Assumption since it does not account for the increasing dependency of interarrival times and service times as packets are made to wait at the nodes.
Show less - Date Issued
- 1986
- PURL
- http://purl.flvc.org/fcla/dt/14327
- Subject Headings
- Computer networks, Data transmission systems
- Format
- Document (PDF)
- Title
- Quantum Circuits for Cryptanalysis.
- Creator
- Amento, Brittanney Jaclyn, Steinwandt, Rainer, Florida Atlantic University, Charles E. Schmidt College of Science, Department of Mathematical Sciences
- Abstract/Description
-
Finite elds of the form F2m play an important role in coding theory and cryptography. We show that the choice of how to represent the elements of these elds can have a signi cant impact on the resource requirements for quantum arithmetic. In particular, we show how the Gaussian normal basis representations and \ghost-bit basis" representations can be used to implement inverters with a quantum circuit of depth O(mlog(m)). To the best of our knowledge, this is the rst construction with...
Show moreFinite elds of the form F2m play an important role in coding theory and cryptography. We show that the choice of how to represent the elements of these elds can have a signi cant impact on the resource requirements for quantum arithmetic. In particular, we show how the Gaussian normal basis representations and \ghost-bit basis" representations can be used to implement inverters with a quantum circuit of depth O(mlog(m)). To the best of our knowledge, this is the rst construction with subquadratic depth reported in the literature. Our quantum circuit for the computation of multiplicative inverses is based on the Itoh-Tsujii algorithm which exploits the property that, in a normal basis representation, squaring corresponds to a permutation of the coe cients. We give resource estimates for the resulting quantum circuit for inversion over binary elds F2m based on an elementary gate set that is useful for fault-tolerant implementation. Elliptic curves over nite elds F2m play a prominent role in modern cryptography. Published quantum algorithms dealing with such curves build on a short Weierstrass form in combination with a ne or projective coordinates. In this thesis we show that changing the curve representation allows a substantial reduction in the number of T-gates needed to implement the curve arithmetic. As a tool, we present a quantum circuit for computing multiplicative inverses in F2m in depth O(mlogm) using a polynomial basis representation, which may be of independent interest. Finally, we change our focus from the design of circuits which aim at attacking computational assumptions on asymmetric cryptographic algorithms to the design of a circuit attacking a symmetric cryptographic algorithm. We consider a block cipher, SERPENT, and our design of a quantum circuit implementing this cipher to be used for a key attack using Grover's algorithm as in [18]. This quantum circuit is essential for understanding the complexity of Grover's algorithm.
Show less - Date Issued
- 2016
- PURL
- http://purl.flvc.org/fau/fd/FA00004662, http://purl.flvc.org/fau/fd/FA00004662
- Subject Headings
- Artificial intelligence, Computer networks, Cryptography, Data encryption (Computer science), Finite fields (Algebra), Quantum theory
- Format
- Document (PDF)
- Title
- A reduced overhead routing protocol for ad hoc wireless networks.
- Creator
- Ibriq, Jamil, Florida Atlantic University, Wu, Jie
- Abstract/Description
-
This document describes the Reduced Overhead Routing (ROR) protocol for use in mobile wireless ad hoc networks. The protocol is highly bandwidth-efficient. The protocol has three distinguishing features: First, it maintains, for each destination, multiple paths. Second, routing table updates are localized. Updates are initiated only when the update table is not empty and the update frequency has not exceeded a specified rate. Third, ROR uses threshold routing technique; it allows an...
Show moreThis document describes the Reduced Overhead Routing (ROR) protocol for use in mobile wireless ad hoc networks. The protocol is highly bandwidth-efficient. The protocol has three distinguishing features: First, it maintains, for each destination, multiple paths. Second, routing table updates are localized. Updates are initiated only when the update table is not empty and the update frequency has not exceeded a specified rate. Third, ROR uses threshold routing technique; it allows an intermediate node to deliver data packet via a longer sub-optimal route that is within the distance. To prevent frequent updates, at most one update is initiated every predefined period of time. A node transmits each update with propagation radius that is determined on the basis of node's network region using a novel probabilistic technique. Threshold routing and localized probabilistic updates greatly reduce routing overhead and network congestion and improve bandwidth efficiency.
Show less - Date Issued
- 2000
- PURL
- http://purl.flvc.org/fcla/dt/12703
- Subject Headings
- Mobile computing, Computer networks, Wireless communication systems
- Format
- Document (PDF)
- Title
- Routing in mobile ad-hoc wireless networks.
- Creator
- Li, Hailan., Florida Atlantic University, Wu, Jie, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
- Abstract/Description
-
This thesis describes routing in mobile ad hoc wireless networks. Ad hoc networks are lack of wired backbone to maintain routes as mobile hosts move and power is on or off. Therefore, the hosts in ad hoc networks must cooperate with each other to determine routes in a distributed manner. Routing based on a connected dominating set is a frequently used approach, where the searching space for a route is reduced to nodes in small connected dominating set subnetwork. We propose a simple and...
Show moreThis thesis describes routing in mobile ad hoc wireless networks. Ad hoc networks are lack of wired backbone to maintain routes as mobile hosts move and power is on or off. Therefore, the hosts in ad hoc networks must cooperate with each other to determine routes in a distributed manner. Routing based on a connected dominating set is a frequently used approach, where the searching space for a route is reduced to nodes in small connected dominating set subnetwork. We propose a simple and efficient distributed algorithm for calculating connected dominating set in a given un-directed ad hoc network, then evaluate the proposed algorithm through simulation. We also discuss connected dominating set update/recalculation algorithms when the topology of the ad hoc network changes. We also explore the possible extension of using hierarchical connected dominating set. The shortest path routing and the dynamic source routing, which are based on the connected dominating set subnetwork, are discussed.
Show less - Date Issued
- 1999
- PURL
- http://purl.flvc.org/fcla/dt/15695
- Subject Headings
- Mobile computing, Computer algorithms, Computer networks
- Format
- Document (PDF)
- Title
- A second order leaky bucket algorithm for traffic shaping in ATM networks.
- Creator
- Bansal, Atul., Florida Atlantic University, Ilyas, Mohammad
- Abstract/Description
-
Asynchronous Transfer Mode (ATM) Networks are based on connections that are multiplexed dynamically on a single link. For satisfactory performance in an ATM network, congestion control is extremely necessary to guarantee the negotiated Quality of Service (QoS) for every connection. Traffic shaping is a congestion control mechanism that alters the traffic characteristics of a stream of cells on a connection to achieve better network efficiency by meeting the QoS objectives. We study a model...
Show moreAsynchronous Transfer Mode (ATM) Networks are based on connections that are multiplexed dynamically on a single link. For satisfactory performance in an ATM network, congestion control is extremely necessary to guarantee the negotiated Quality of Service (QoS) for every connection. Traffic shaping is a congestion control mechanism that alters the traffic characteristics of a stream of cells on a connection to achieve better network efficiency by meeting the QoS objectives. We study a model for Traffic Shaping, Second Order Leaky Bucket, which consists of two leaky buckets to police the Sustained Cell Rate (SCR) and Burst Tolerance (BT) for each ATM connection. With this algorithm, ATM cells enter the first leaky bucket and the Cells conforming to the first leaky bucket enter the ATM network with Cell Loss Priority set to zero (CLP = 0). Any cell non-conforming to the first leaky bucket is sent to a second leaky bucket, and will be tagged CLP = 1 only if found to be non-conforming to the second leaky bucket. Cells conforming to the second leaky bucket are allowed to enter the ATM network with CLP = 0. We simulate the second-order leaky bucket for traffic shaping and show the effectiveness of second order leaky bucket in protecting the QoS experienced by connections passing through a common internodal link queue.
Show less - Date Issued
- 1998
- PURL
- http://purl.flvc.org/fcla/dt/15607
- Subject Headings
- Asynchronous transfer mode, Telecommunication--Traffic, Computer networks
- Format
- Document (PDF)