Current Search: Rao, Radha Nallur Seshagiri. (x)
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Title
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Performance analysis of a very fast packet switching system for broadband ISDN.
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Creator
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Rao, Radha Nallur Seshagiri., Florida Atlantic University, Ilyas, Mohammad, College of Engineering and Computer Science, Department of Computer and Electrical Engineering and Computer Science
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Abstract/Description
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Rapid advances in technology have resulted in the evolution of Integrated Services Digital Networks (ISDNs) to Broadband ISDNs (BISDNs). This thesis discusses and evaluates the performance of a high speed and high capacity packet switching system architecture for BISDNs. This system supports various high speed communication services like data, voice, and video services. The main performance criterion is the mean switching delay, which is defined as the packet transfer delay through the bus...
Show moreRapid advances in technology have resulted in the evolution of Integrated Services Digital Networks (ISDNs) to Broadband ISDNs (BISDNs). This thesis discusses and evaluates the performance of a high speed and high capacity packet switching system architecture for BISDNs. This system supports various high speed communication services like data, voice, and video services. The main performance criterion is the mean switching delay, which is defined as the packet transfer delay through the bus and through the loop connecting various switch modules in the system. Other performance criteria are power and system throughput. The performance parameters are evaluated separately for both data and control (signaling) packets. The effects of the number of switch modules in the system, the data packet length, and the ratio of arrival rate of data to control packets are examined. It is observed that the switching delay and throughput increase with an increase in the traffic intensity for any number of switching modules and the ratio of arrival rate of data to control packets. The delay for data packets is found to be higher for lower values of this ratio and vice versa. The power is found to be maximum for about 70% load. The switching delay in this simulation model is found to be less than one millisecond for data packets.
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Date Issued
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1990
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PURL
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http://purl.flvc.org/fcla/dt/14603
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Subject Headings
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Packet switching (Data transmission), Integrated services digital networks, Broadband communication systems
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Format
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Document (PDF)
